Eddie Hung 289cf688b7 Re-add DSP_A_MINWIDTH, remove unnec. opt_expr -fine from synth_ice40

2019-09-20 09:02:29 -07:00

..

tests

Revert "Merge pull request #1280 from YosysHQ/revert-1266-eddie/ice40_full_adder"

2019-08-12 12:06:45 -07:00

.gitignore

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abc_hx.box

Rename boxes too

2019-08-29 07:03:32 -07:00

abc_hx.lut

Fix rename

2019-04-18 09:04:34 -07:00

abc_lp.box

Rename boxes too

2019-08-29 07:03:32 -07:00

abc_lp.lut

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abc_u.box

Rename boxes too

2019-08-29 07:03:32 -07:00

abc_u.lut

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arith_map.v

Revert "Merge pull request #1280 from YosysHQ/revert-1266-eddie/ice40_full_adder"

2019-08-12 12:06:45 -07:00

brams_init.py

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brams_map.v

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brams.txt

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cells_map.v

Fix $lut pin ordering inside $__ICE40_CARRY_WRAPPER

2019-08-12 12:19:25 -07:00

cells_sim.v

Comment out SB_MAC16 arrival time for now, need to handle all its modes

2019-08-28 19:09:29 -07:00

dsp_map.v

Rework ice40_dsp to map to SB_MAC16 earlier, and check before packing

2019-08-08 12:56:05 -07:00

ice40_braminit.cc

substr() -> compare()

2019-08-07 12:20:08 -07:00

ice40_ffinit.cc

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ice40_ffssr.cc

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ice40_opt.cc

Do not overwrite LUT param

2019-08-28 18:46:53 -07:00

latches_map.v

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Makefile.inc

Merge branch 'master' into xc7dsp

2019-08-30 13:57:15 +01:00

synth_ice40.cc

Re-add DSP_A_MINWIDTH, remove unnec. opt_expr -fine from synth_ice40

2019-09-20 09:02:29 -07:00