Jeff Goeders 8be56960a2 Move signal declarations to before first use ...

Signed-off-by: Jeff Goeders <jeff.goeders@gmail.com>

2020-10-19 16:09:18 -06:00

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tests

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.gitignore

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abc9_model.v

abc9_ops: add -prep_bypass for auto bypass boxes; refactor

2020-05-14 10:33:56 -07:00

arith_map.v

Remove EXPLICIT_CARRY logic.

2020-07-23 00:56:09 +02:00

brams_init.py

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cells_map.v

xilinx: Use dfflegalize.

2020-07-09 18:54:23 +02:00

cells_sim.v

Move signal declarations to before first use

2020-10-19 16:09:18 -06:00

cells_xtra.py

xilinx: Mark IOBUFDS.IOB as external pad

2020-03-20 14:37:38 +01:00

cells_xtra.v

xilinx: Mark IOBUFDS.IOB as external pad

2020-03-20 14:37:38 +01:00

ff_map.v

xilinx: Use dfflegalize.

2020-07-09 18:54:23 +02:00

lut4_lutrams.txt

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lut6_lutrams.txt

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lut_map.v

Add force_downto and force_upto wire attributes.

2020-05-19 01:42:40 +02:00

lutrams_map.v

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Makefile.inc

xilinx: Use dfflegalize.

2020-07-09 18:54:23 +02:00

mux_map.v

Add force_downto and force_upto wire attributes.

2020-05-19 01:42:40 +02:00

synth_xilinx.cc

Replace opt_rmdff with opt_dff.

2020-08-07 13:21:03 +02:00

xc2v_brams_map.v

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xc2v_brams.txt

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xc3s_mult_map.v

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xc3sa_brams.txt

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xc3sda_brams.txt

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xc3sda_dsp_map.v

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xc4v_dsp_map.v

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xc5v_dsp_map.v

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xc6s_brams_map.v

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xc6s_brams.txt

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xc6s_dsp_map.v

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xc7_brams_map.v

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xc7_dsp_map.v

xilinx: do not make DSP48E1 a whitebox for ABC9 by default (#2325)

2020-09-23 09:15:24 -07:00

xc7_xcu_brams.txt

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xcu_brams_map.v

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xcu_dsp_map.v

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xcup_urams_map.v

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xcup_urams.txt

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xilinx_dffopt.cc

Use C++11 final/override keywords.

2020-06-18 23:34:52 +00:00