Clifford Wolf 1d58bbb79c Merge pull request #1175 from whitequark/write_verilog-fix-case-attr-position ...

write_verilog: fix placement of case attributes

2019-07-09 22:19:34 +01:00

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aiger

Fix gcc invalidation behaviour for write_aiger

2019-06-20 21:56:47 -07:00

blif

Fix handling of offset and upto module ports in write_blif, fixes #1040

2019-05-25 17:45:14 +02:00

btor

Improve BTOR2 handling of undriven wires

2019-06-26 17:42:00 +02:00

edif

Add "whitebox" attribute, add "read_verilog -wb"

2019-04-18 17:45:47 +02:00

firrtl

Fix static shift operands, neg result type, minor formatting

2019-05-21 13:04:56 -07:00

ilang

Merge pull request #1162 from whitequark/rtlil-case-attrs

2019-07-09 18:48:38 +01:00

intersynth

Add "whitebox" attribute, add "read_verilog -wb"

2019-04-18 17:45:47 +02:00

json

Fix json formatting

2019-06-21 20:01:40 +02:00

protobuf

Support filename rewrite in backends

2019-06-18 14:39:52 -07:00

simplec

Fix typographical and grammatical errors and inconsistencies.

2019-01-02 13:12:17 +00:00

smt2

Escape scope names starting with dollar sign in smtio.py

2019-06-26 10:58:39 +02:00

smv

Add "whitebox" attribute, add "read_verilog -wb"

2019-04-18 17:45:47 +02:00

spice

Add "whitebox" attribute, add "read_verilog -wb"

2019-04-18 17:45:47 +02:00

table

Add "whitebox" attribute, add "read_verilog -wb"

2019-04-18 17:45:47 +02:00

verilog

Merge pull request #1175 from whitequark/write_verilog-fix-case-attr-position

2019-07-09 22:19:34 +01:00