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mirror of synced 2026-01-13 15:37:16 +00:00
Patrick Urban 4bee908ae8 synth_gatemate: Revise block RAM read modes and initialization
* enable mixed read-width / write-width ports in SDP mode
* fix NO_CHANGE and WRITE_THROUGH behavior during read access
* remove redundant zero-initialization
* set A/B_WE bit during map (gatemate_bramopt pass could be removed later)
* differentiate "upper" and "lower" initialization for cascade mode
2021-11-13 21:53:25 +01:00
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2021-10-27 16:18:05 +02:00
2021-04-17 20:54:58 +02:00
2013-01-05 11:19:11 +01:00