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52c243cf05c331ef2c1ce01416e85f2fb8a70a33
YosysHQ.yosys
/
frontends
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verilog
History
Clifford Wolf
ecdc22b06c
Added support for macros as include file names
2016-11-28 14:50:17 +01:00
..
.gitignore
Updated .gitignore file for ilang and verilog frontends
2014-10-15 01:14:38 +02:00
const2ast.cc
Fixed segfault on invalid verilog constant 1'b_
2015-09-22 08:13:09 +02:00
Makefile.inc
Adjust makefiles to work with out-of-tree builds
2015-08-12 15:04:44 +02:00
preproc.cc
Added support for macros as include file names
2016-11-28 14:50:17 +01:00
verilog_frontend.cc
Bugfix in "read_verilog -D NAME=VAL" handling
2016-11-28 14:45:05 +01:00
verilog_frontend.h
Remember global declarations and defines accross read_verilog calls
2016-11-15 12:42:43 +01:00
verilog_lexer.l
Removed $predict again
2016-08-28 21:35:33 +02:00
verilog_parser.y
Added support for hierarchical defparams
2016-11-15 13:35:19 +01:00