Xiretza 7f1d83c5db Add .gitignore to tests/select/

2020-04-12 22:45:45 +02:00

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aiger

tests/aiger: Add missing .gitignore

2020-02-15 19:52:21 +01:00

arch

Merge pull request #1603 from whitequark/ice40-ram_style

2020-04-10 14:51:01 +00:00

asicworld

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bram

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errors

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fsm

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hana

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liberty

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lut

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memfile

Added 'set -e' into tests/memfile/run-test.sh

2020-02-06 10:45:40 -03:00

memories

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opt

Merge pull request #1790 from YosysHQ/eddie/opt_expr_xor

2020-04-01 14:17:01 -07:00

opt_share

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proc

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realmath

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rpc

rpc test: make frontend listen before launching yosys & introduce safeguard if yosys errors

2020-03-06 15:29:01 +01:00

sat

Merge pull request #1638 from YosysHQ/eddie/fix1631

2020-02-05 19:31:18 +01:00

select

Add .gitignore to tests/select/

2020-04-12 22:45:45 +02:00

share

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simple

Add dynamic slicing Verilog testcase

2020-03-31 11:51:31 -07:00

simple_abc9

Update simple_abc9 tests

2020-02-27 10:17:29 -08:00

smv

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sva

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svinterfaces

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svtypes

Support module/package/interface/block scope for typedef names.

2020-03-23 20:07:22 +00:00

techmap

Merge pull request #1648 from YosysHQ/eddie/cmp2lcu

2020-04-03 16:28:25 -07:00

tools

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unit

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various

tests: add a quick plugin test

2020-04-09 09:45:20 -07:00

vloghtb

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