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YosysHQ.yosys/techlibs/ecp5
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Miodrag Milanovic a3c16a0565 Fix TRELLIS_FF simulation model
2019-08-31 11:12:06 +02:00
..
tests
ecp5: Add simulation equivalence check for Diamond FF implementations
2019-08-30 13:27:36 +01:00
.gitignore
ecp5: First BRAM type maps successfully
2018-10-10 16:35:19 +01:00
abc_5g_nowide.lut
Add _nowide variants of LUT libraries in -nowidelut flows
2019-06-26 10:23:29 -07:00
abc_5g.box
Fix DO4 typo
2019-06-28 09:45:40 -07:00
abc_5g.lut
ecp5: Add abc9 option
2019-06-14 17:15:02 +01:00
arith_map.v
ecp5: Improve mapping of $alu when BI is used
2019-06-21 09:45:11 +01:00
bram.txt
ecp5: First BRAM type maps successfully
2018-10-10 16:35:19 +01:00
brams_connect.py
ecp5: Script for BRAM IO connections
2018-10-10 16:11:00 +01:00
brams_init.py
ecp5: First BRAM type maps successfully
2018-10-10 16:35:19 +01:00
brams_map.v
ecp5: Add GSR support
2019-08-27 13:07:06 +01:00
cells_bb.v
ecp5: Add GSR support
2019-08-27 13:07:06 +01:00
cells_ff.vh
ecp5: deduplicate Diamond FD/IFS/OFS/IO primitives.
2019-08-30 10:05:09 +00:00
cells_io.vh
ecp5: deduplicate Diamond FD/IFS/OFS/IO primitives.
2019-08-30 10:05:09 +00:00
cells_map.v
ecp5: deduplicate Diamond FD/IFS/OFS/IO primitives.
2019-08-30 10:05:09 +00:00
cells_sim.v
Fix TRELLIS_FF simulation model
2019-08-31 11:12:06 +02:00
ecp5_ffinit.cc
ecp5: Demote conflicting FF init values to a warning
2019-03-04 11:26:20 +00:00
ecp5_gsr.cc
ecp5_gsr: Fix typo
2019-08-31 09:58:46 +01:00
latches_map.v
ecp5: Add latch inference
2018-10-19 15:16:40 +01:00
lutram.txt
synth_ecp5: rename dram to lutram everywhere.
2019-07-16 20:45:12 +00:00
lutrams_map.v
synth_ecp5: rename dram to lutram everywhere.
2019-07-16 20:45:12 +00:00
Makefile.inc
ecp5: deduplicate Diamond FD/IFS/OFS/IO primitives.
2019-08-30 10:05:09 +00:00
synth_ecp5.cc
ecp5: Add GSR support
2019-08-27 13:07:06 +01:00