Eddie Hung a7e6032287 Set USE_MULT and USE_SIMD

2019-09-09 20:56:29 -07:00

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tests

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.gitignore

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abc_map.v

Resolve TODO with pin assignments for SRL*

2019-09-04 15:47:36 -07:00

abc_model.v

xilinx to use abc_map.v with -max_iter 1

2019-08-20 19:47:11 -07:00

abc_unmap.v

xilinx to use abc_map.v with -max_iter 1

2019-08-20 19:47:11 -07:00

abc_xc7_nowide.lut

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abc_xc7.box

Add comments

2019-09-02 12:22:15 -07:00

abc_xc7.lut

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arith_map.v

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brams_init.py

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cells_map.v

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cells_sim.v

Merge remote-tracking branch 'origin/master' into xc7dsp

2019-09-05 13:01:27 -07:00

cells_xtra.py

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cells_xtra.v

Merge branch 'master' into xc7dsp

2019-08-30 13:57:15 +01:00

dsp_map.v

Set USE_MULT and USE_SIMD

2019-09-09 20:56:29 -07:00

ff_map.v

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lut_map.v

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lutrams_map.v

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lutrams.txt

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Makefile.inc

Merge remote-tracking branch 'origin/master' into xc7dsp

2019-09-05 13:01:27 -07:00

mux_map.v

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synth_xilinx.cc

Merge remote-tracking branch 'origin/master' into xc7dsp

2019-09-05 13:01:27 -07:00

xc6s_brams_bb.v

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xc6s_brams_map.v

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xc6s_brams.txt

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xc7_brams_bb.v

Merge remote-tracking branch 'origin/master' into xaig_arrival

2019-08-28 15:19:10 -07:00

xc7_brams_map.v

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xc7_brams.txt

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