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YosysHQ.yosys/techlibs
Jannis Harder 605d127517 simlib: Silence iverilog warning for $lut
iverilog complains about implicitly truncating LUT when connecting it to
the `$bmux` A input. This explicitly truncates it to avoid that warning
without changing the behaviour otherwise.
2022-11-30 18:24:35 +01:00
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