This website requires JavaScript.
Explore
Help
Register
Sign In
github.com
/
YosysHQ.yosys
Watch
1
Star
0
Fork
0
You've already forked YosysHQ.yosys
mirror of
synced
2026-01-28 21:11:14 +00:00
Code
Issues
Releases
Wiki
Activity
Files
65234d4b24edd1ec8ec5d41df2d56d76fa41dcc5
YosysHQ.yosys
/
techlibs
/
ecp5
History
David Shah
3a3558acce
ecp5: Fixing miscellaneous sim model issues
...
Signed-off-by: David Shah <
davey1576@gmail.com
>
2018-07-16 15:56:12 +02:00
..
arith_map.v
ecp5: ECP5 synthesis fixes
2018-07-16 14:33:13 +02:00
cells_map.v
ecp5: Adding synchronous set/reset support
2018-07-14 16:18:01 +02:00
cells_sim.v
ecp5: Fixing miscellaneous sim model issues
2018-07-16 15:56:12 +02:00
dram.txt
ecp5: Add DRAM match rule
2018-07-13 16:25:52 +02:00
drams_map.v
ecp5: Adding DRAM map
2018-07-13 14:08:42 +02:00
Makefile.inc
ecp5: Initial arith_map implementation
2018-07-13 15:46:12 +02:00
synth_ecp5.cc
ecp5: ECP5 synthesis fixes
2018-07-16 14:33:13 +02:00