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665759fceee4a0db3e776b7912e976eea2ff29a3
YosysHQ.yosys
/
passes
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proc
History
Clifford Wolf
2bec47a404
Use only module->addCell() and module->remove() to create and delete cells
2014-07-25 17:56:19 +02:00
..
Makefile.inc
Major improvements in mem2reg and added "init" sync rules
2013-11-21 13:49:00 +01:00
proc_arst.cc
Fixed all users of SigSpec::chunks_rw() and removed it
2014-07-23 15:36:09 +02:00
proc_clean.cc
SigSpec refactoring: using the accessor functions everywhere
2014-07-22 20:39:37 +02:00
proc_dff.cc
Use only module->addCell() and module->remove() to create and delete cells
2014-07-25 17:56:19 +02:00
proc_init.cc
Replaced more old SigChunk programming patterns
2014-07-24 23:10:58 +02:00
proc_mux.cc
Use only module->addCell() and module->remove() to create and delete cells
2014-07-25 17:56:19 +02:00
proc_rmdead.cc
Added help messages to proc_* passes
2013-03-01 09:26:29 +01:00
proc.cc
Major improvements in mem2reg and added "init" sync rules
2013-11-21 13:49:00 +01:00