Robert O'Callahan 1260fda83a Add 'init' attributes to RTLIL fuzzing

2026-03-06 02:20:08 +00:00

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.gitignore

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autotest.mk

Update cells supported for verilog to FIRRTL conversion.

2019-02-15 11:14:17 -08:00

autotest.sh

Missed an iverilog

2025-12-15 10:31:17 +13:00

cmp_tbdata.c

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profiler.pl

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rtlil-fuzz-grammar.json

Add 'init' attributes to RTLIL fuzzing

2026-03-06 02:20:08 +00:00

txt2tikztiming.py

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vcd2txt.pl

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vcdcd.pl

Fixes in vcdcd.pl for newer Perl versions

2021-10-19 10:56:43 +02:00