github.com/YosysHQ.yosys
1
0
Fork 0
mirror of synced 2026-02-16 04:52:43 +00:00
Code Issues Releases Wiki Activity
Files
8501342fc5898ea1e6aadc33a27df54fa82d9107
YosysHQ.yosys/tests
History
Marcelina Kościelnicka 8501342fc5 synth_xilinx: Use opt_dff. 
The main part is converting xilinx_dsp to recognize the new FF types
created in opt_dff instead of trying to recognize the patterns on its
own.

The fsm call has been moved upwards because the passes cannot deal with
$dffe/$sdff*, and other optimizations don't help it much anyway.
2020-07-30 22:26:09 +02:00
..
aiger
tests: aiger test for wire->start_offset != 0
2020-05-02 10:00:32 -07:00
arch
synth_xilinx: Use opt_dff.
2020-07-30 22:26:09 +02:00
asicworld
…
bram
…
errors
…
fsm
tests: fsm to use a randomly-generated seed
2020-04-24 14:31:33 -07:00
hana
…
liberty
dfflibmap: Refactor to use dfflegalize internally.
2020-07-09 18:51:03 +02:00
lut
Forgot to commit
2019-07-16 12:44:26 -07:00
memfile
Added 'set -e' into tests/memfile/run-test.sh
2020-02-06 10:45:40 -03:00
memories
memory_dff: Fix checking of feedback mux input when more than one mux
2019-07-02 13:35:50 +01:00
opt
Add opt_dff pass.
2020-07-30 18:27:04 +02:00
opt_share
Support various binary operators in opt_share
2019-08-04 19:06:38 +02:00
proc
proc_clean: fix order of switch insertion.
2019-08-19 16:44:23 +00:00
realmath
…
rpc
rpc test: make frontend listen before launching yosys & introduce safeguard if yosys errors
2020-03-06 15:29:01 +01:00
sat
satgen: Add support for dffe, sdff, sdffe, sdffce cells.
2020-07-24 03:19:21 +02:00
select
Merge pull request #1949 from YosysHQ/eddie/select_blackbox
2020-04-22 15:35:05 -07:00
share
…
simple
Expand tests/simple/constmuldivmod.v
2020-05-28 22:59:04 +02:00
simple_abc9
abc9: test to use box file instead of auto
2020-05-14 10:33:56 -07:00
smv
…
sva
…
svinterfaces
…
svtypes
static cast: add tests
2020-06-19 17:40:38 -07:00
techmap
zinit: Refactor to use FfInitVals.
2020-07-24 11:22:31 +02:00
tools
autotest.sh to define _AUTOTB when test_autotb
2019-06-28 14:56:22 -07:00
unit
…
various
Merge pull request #2306 from YosysHQ/mwk/equiv_induct-undef
2020-07-28 12:56:22 +02:00
verilog
Merge pull request #2080 from YosysHQ/eddie/fix_test_warnings
2020-06-03 08:37:07 -07:00
vloghtb
…