Clifford Wolf 864808992b Bugfix in Xilinx LUT mapping

2015-10-30 13:58:03 +01:00

..

common

Progress on cell help messages

2015-10-20 16:49:11 +02:00

greenpak4

Added nlutmap

2015-09-18 21:57:34 +02:00

ice40

Added read-enable to memory model

2015-09-25 12:23:11 +02:00

xilinx

Bugfix in Xilinx LUT mapping

2015-10-30 13:58:03 +01:00

.gitignore

added .gitignore files

2013-01-05 11:19:11 +01:00