Eddie Hung bb4ae8bc66 Merge pull request #1138 from YosysHQ/koriakin/xc7nocarrymux ...

synth_xilinx: Add -nocarry and -nowidelut options

2019-06-27 06:04:56 -07:00

..

.gitignore

ecp5: First BRAM type maps successfully

2018-10-10 16:35:19 +01:00

arith_map.v

ecp5: Improve mapping of $alu when BI is used

2019-06-21 09:45:11 +01:00

bram.txt

ecp5: First BRAM type maps successfully

2018-10-10 16:35:19 +01:00

brams_connect.py

ecp5: Script for BRAM IO connections

2018-10-10 16:11:00 +01:00

brams_init.py

ecp5: First BRAM type maps successfully

2018-10-10 16:35:19 +01:00

brams_map.v

ecp5: Disable LSR inversion

2018-10-16 12:48:39 +01:00

cells_bb.v

ecp5: Add DDRDLLA

2019-02-19 19:34:37 +00:00

cells_map.v

Add more ECP5 Diamond flip-flops.

2019-06-26 01:57:29 +00:00

cells_sim.v

Simulation model verilog fix

2019-06-26 18:34:34 +02:00

dram.txt

ecp5: Don't map ROMs to DRAM

2018-10-01 18:34:41 +01:00

drams_map.v

ecp5: Adding DRAM map

2018-07-13 14:08:42 +02:00

ecp5_ffinit.cc

ecp5: Demote conflicting FF init values to a warning

2019-03-04 11:26:20 +00:00

latches_map.v

ecp5: Add latch inference

2018-10-19 15:16:40 +01:00

Makefile.inc

ecp5: Support for flipflop initialisation

2019-01-22 16:02:56 +00:00

synth_ecp5.cc

synth_ecp5 rename -nomux to -nowidelut, but preserve former

2019-06-26 09:33:48 -07:00