Clifford Wolf dbfd8460a9 Allow $size and $bits in verilog mode, actually check test case

2017-09-29 11:56:43 +02:00

..

ast.cc

Add $live and $fair cell types, add support for s_eventually keyword

2017-02-25 10:36:39 +01:00

ast.h

Add $live and $fair cell types, add support for s_eventually keyword

2017-02-25 10:36:39 +01:00

dpicall.cc

Fixed trailing whitespaces

2015-07-02 11:14:30 +02:00

genrtlil.cc

Fix generation of vlogtb output in yosys-smtbmc for "rand reg" and "rand const reg"

2017-06-07 12:30:24 +02:00

Makefile.inc

Added Verilog/AST support for DPI functions (dpi_call() still unimplemented)

2014-08-21 12:43:51 +02:00

simplify.cc

Allow $size and $bits in verilog mode, actually check test case

2017-09-29 11:56:43 +02:00