Kamil Rakoczy 98c4feb72f Add check of begin/end labels for genblock ...

Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>

2021-02-04 17:16:30 +01:00

..

aiger

switch argument order to work with macOS getopt

2020-09-23 12:48:26 +02:00

arch

xilinx_dffopt: Don't crash on missing IS_*_INVERTED.

2021-01-27 00:32:00 +01:00

asicworld

Fix FIRRTL to Verilog process instance subfield assignment.

2019-02-25 16:18:13 -08:00

bram

Added support for (single-clock) transparent memories to bram tests

2016-11-01 10:03:13 +01:00

errors

Rename the generic "Syntax error" message from the Verilog/SystemVerilog parser into unique,

2018-10-25 02:37:56 +03:00

fsm

tests: fsm to use a randomly-generated seed

2020-04-24 14:31:33 -07:00

hana

Add optional SEED=n command line option to Makefile, and -S n command line option to test scripts, for deterministic regression tests.

2016-09-22 11:49:29 -06:00

liberty

dfflibmap: Refactor to use dfflegalize internally.

2020-07-09 18:51:03 +02:00

lut

Forgot to commit

2019-07-16 12:44:26 -07:00

memfile

Added 'set -e' into tests/memfile/run-test.sh

2020-02-06 10:45:40 -03:00

memories

tests: Parallelize

2020-09-21 15:07:02 +02:00

opt

opt_share: Fix X and CO signal width for shifted $alu in opt_share.

2021-01-14 14:54:08 +01:00

opt_share

tests: Parallelize

2020-09-21 15:07:02 +02:00

proc

proc_clean: fix order of switch insertion.

2019-08-19 16:44:23 +00:00

realmath

Add optional SEED=n command line option to Makefile, and -S n command line option to test scripts, for deterministic regression tests.

2016-09-22 11:49:29 -06:00

rpc

rpc test: make frontend listen before launching yosys & introduce safeguard if yosys errors

2020-03-06 15:29:01 +01:00

sat

Merge pull request #2378 from udif/pr_dollar_high_low

2020-10-01 18:17:36 +02:00

select

Merge pull request #1949 from YosysHQ/eddie/select_blackbox

2020-04-22 15:35:05 -07:00

share

Add optional SEED=n command line option to Makefile, and -S n command line option to test scripts, for deterministic regression tests.

2016-09-22 11:49:29 -06:00

simple

Merge pull request #2529 from zachjs/unnamed-genblk

2021-02-04 09:57:28 +00:00

simple_abc9

abc9: test to use box file instead of auto

2020-05-14 10:33:56 -07:00

smv

Progress in SMV back-end

2015-06-19 14:08:46 +02:00

sva

Fix "verific -extnets" for more complex situations

2019-03-26 14:17:46 +01:00

svinterfaces

Fix typo in tests/svinterfaces/runone.sh

2019-05-03 14:40:51 +02:00

svtypes

Add typedef input/output test

2021-01-18 17:31:22 +01:00

techmap

tests: Centralize test collection and Makefile generation

2020-09-21 15:07:02 +02:00

tools

Replace opt_rmdff with opt_dff.

2020-08-07 13:21:03 +02:00

unit

Build hotfix in tests/unit/Makefile

2016-12-11 10:58:49 +01:00

various

verilog: significant block scoping improvements

2021-01-31 09:42:09 -05:00

verilog

Add check of begin/end labels for genblock

2021-02-04 17:16:30 +01:00

vloghtb

bugfix in blif front-end

2015-05-18 11:15:49 +02:00

gen-tests-makefile.sh

tests: Parallelize

2020-09-21 15:07:02 +02:00