Emil J 992e64342c Merge pull request #5621 from rocallahan/remove-opt-sort ...

Remove `Design::sort()` calls from optimization passes

2026-02-04 16:55:56 +01:00

..

adc.v

Gowin. Fix GW5A ADCs.

2025-10-29 12:48:21 +10:00

arith_map.v

gowin: Fix X output of $alu techmap

2023-05-01 17:56:41 +02:00

brams_map_gw5a.v

Gowin. Fix style.

2026-01-05 20:07:31 +10:00

brams_map.v

Gowin. Fix style.

2026-01-05 20:07:31 +10:00

brams.txt

Gowin. Implement byte enable.

2026-01-03 17:42:49 +10:00

cells_map.v

iopadmap: Add native support for negative-polarity output enable.

2021-11-09 15:40:16 +01:00

cells_sim.v

Gowin. Renaming inputs of the DCS primitive.

2025-09-20 16:22:23 +01:00

cells_xtra_gw1n.v

Add and use fix_mod.py

2026-01-28 07:45:58 +13:00

cells_xtra_gw2a.v

Add and use fix_mod.py

2026-01-28 07:45:58 +13:00

cells_xtra_gw5a.v

Add and use fix_mod.py

2026-01-28 07:45:58 +13:00

cells_xtra.py

Gowin. Fix GW5A ADCs.

2025-10-29 12:48:21 +10:00

lutrams_map.v

gowin: Use memory_libmap pass.

2022-05-18 17:32:56 +02:00

lutrams.txt

gowin: Use memory_libmap pass.

2022-05-18 17:32:56 +02:00

Makefile.inc

Gowin. Handle the WRITE_MODE.

2025-10-25 23:15:23 +01:00

synth_gowin.cc

Move Design::sort() calls out of opt and opt_clean passes into the synth passes that need them.

2026-01-23 01:14:35 +00:00