Eddie Hung 38ee59184c tests: remove write_ilang

2020-04-20 15:42:29 -07:00

..

.gitignore

Moved all tests in arch sub directory

2019-10-18 11:06:12 +02:00

add_sub.ys

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2019-10-18 12:19:59 +02:00

adffs.ys

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2019-10-18 12:19:59 +02:00

bug1459.ys

Add testcase from #1459

2020-01-06 16:22:22 -08:00

bug1598.ys

Add #1598 testcase

2019-12-27 16:44:57 -08:00

bug1630.il.gz

Add #1630 testcase

2020-01-13 21:27:53 -08:00

bug1630.ys

Update bug1630.ys to use -lut 4 instead of lut file

2020-02-27 10:17:29 -08:00

counter.ys

Call equiv_opt with -multiclock and -assert

2019-12-31 18:39:32 -08:00

dffs.ys

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2019-10-18 12:19:59 +02:00

dpram.v

Moved all tests in arch sub directory

2019-10-18 11:06:12 +02:00

dpram.ys

Moved all tests in arch sub directory

2019-10-18 11:06:12 +02:00

fsm.ys

Fixed tests

2019-11-11 15:41:33 +01:00

latches.ys

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2019-10-18 12:19:59 +02:00

logic.ys

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2019-10-18 12:19:59 +02:00

lutram.ys

Rename memory tests to lutram, add more xilinx tests

2019-12-12 17:44:37 -08:00

macc.v

Moved all tests in arch sub directory

2019-10-18 11:06:12 +02:00

macc.ys

Do not do call equiv_opt when no sim model exists

2019-12-31 18:40:30 -08:00

memories.ys

tests: remove write_ilang

2020-04-20 15:42:29 -07:00

mul.ys

Do not do call equiv_opt when no sim model exists

2019-12-31 18:40:30 -08:00

mux.ys

Update tests with reduced area

2020-01-21 16:50:04 -08:00

opt_lut_ins.ys

Add opt_lut_ins pass. (#1673)

2020-02-03 14:57:17 +01:00

rom.v

Moved all tests in arch sub directory

2019-10-18 11:06:12 +02:00

rom.ys

Moved all tests in arch sub directory

2019-10-18 11:06:12 +02:00

run-test.sh

Fix path to yosys

2019-10-18 11:12:03 +02:00

shifter.ys

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2019-10-18 12:19:59 +02:00

tribuf.ys

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2019-10-18 12:19:59 +02:00