1
0
mirror of synced 2026-01-19 17:48:54 +00:00
Martin Povišer f8325f66b7 opt_expr: Fix 'signed X>=0' replacement for wide output ports
If the `$ge` cell we are replacing has wide output port, the upper bits
on the port should be driven to zero. That's not what a `$not` cell with
a single-bit input does. Instead opt for a `$logic_not` cell, which does
zero-pad its output.

Fixes #3867.
2023-08-01 13:50:12 +01:00
..
2023-06-09 14:41:45 +02:00
2021-12-10 00:22:37 +01:00
2023-05-17 13:39:57 +02:00
2019-07-16 12:44:26 -07:00
2023-02-21 05:23:15 +13:00
2021-12-10 00:22:37 +01:00
2020-09-21 15:07:02 +02:00
2022-03-14 15:39:11 +01:00
2021-03-29 22:01:57 -07:00