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YosysHQ.yosys
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techlibs
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microchip
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chunlin min
3db69b7a10
inline all tests. Add switch to remove init values as PolarFire DFFs do not support init
2024-07-08 17:03:03 -04:00
..
arith_map.v
add assertions for synth_microchip tests
2024-07-04 15:45:44 -04:00
brams_defs.vh
Add missing u sram init (
#3
)
2024-07-04 16:39:10 -04:00
cells_map.v
…
cells_sim.v
Revisions (
#4
)
2024-07-08 10:57:16 -04:00
LSRAM_map.v
…
LSRAM.txt
…
Makefile.inc
fixed typos, build with makefile succeeds
2024-07-04 09:33:58 -07:00
microchip_dffopt.cc
initialize argidx to 1
2024-07-08 11:41:41 -04:00
polarfire_dsp_map.v
…
synth_microchip.cc
inline all tests. Add switch to remove init values as PolarFire DFFs do not support init
2024-07-08 17:03:03 -04:00
uSRAM_map.v
Add missing u sram init (
#3
)
2024-07-04 16:39:10 -04:00
uSRAM.txt
…
