Clifford Wolf dbfd8460a9 Allow $size and $bits in verilog mode, actually check test case

2017-09-29 11:56:43 +02:00

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.gitignore

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asserts_seq.v

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asserts_seq.ys

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asserts.v

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asserts.ys

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counters.v

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counters.ys

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expose_dff.v

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expose_dff.ys

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initval.v

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initval.ys

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run-test.sh

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share.v

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share.ys

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sizebits.sv

Allow $size and $bits in verilog mode, actually check test case

2017-09-29 11:56:43 +02:00

sizebits.ys

Allow $size and $bits in verilog mode, actually check test case

2017-09-29 11:56:43 +02:00

splice.v

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splice.ys

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