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APPNOTE_011_Design_Investigation

Finished AppNote 011

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CHAPTER_Eval

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CHAPTER_Prog

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CHAPTER_StateOfTheArt

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PRESENTATION_Intro

presentation progress

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.gitignore

presentation progress

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APPNOTE_010_Verilog_to_BLIF.tex

Fixed bug in example prog in appnote 011

2013-12-05 18:15:14 +01:00

APPNOTE_011_Design_Investigation.tex

Finished AppNote 011

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appnotes.sh

Added first presentation slides

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CHAPTER_Appnotes.tex

Added Yosys Manual

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CHAPTER_Approach.tex

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CHAPTER_Auxlibs.tex

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CHAPTER_Auxprogs.tex

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CHAPTER_Basics.tex

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CHAPTER_CellLib.tex

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CHAPTER_Eval.tex

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CHAPTER_Intro.tex

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CHAPTER_Optimize.tex

Added Yosys Manual

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CHAPTER_Overview.tex

Updated manual

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CHAPTER_Prog.tex

Renamed manual/FILES_* directories

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CHAPTER_StateOfTheArt.tex

Renamed manual/FILES_* directories

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CHAPTER_Techmap.tex

Moved common techlib files to techlibs/common

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CHAPTER_Verilog.tex

Added RTLIL and Liberty syntax highlighting to manual

2013-07-25 14:00:16 +02:00

command-reference-manual.tex

Updated manual/command-reference-manual.tex

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literature.bib

Added Yosys Manual

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manual.sh

Added first presentation slides

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manual.tex

Fixed comments in manual rtlil/ilang syntax

2013-07-25 15:01:02 +02:00

PRESENTATION_ExSyn.tex

presentation progress

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PRESENTATION_Intro.tex

Progress on presentation

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presentation.sh

presentation progress

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presentation.tex

presentation progress

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weblinks.bib

Added Yosys Manual

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