This website requires JavaScript.
Explore
Help
Register
Sign In
github.com
/
YosysHQ.yosys
Watch
1
Star
0
Fork
0
You've already forked YosysHQ.yosys
mirror of
synced
2026-01-24 19:42:18 +00:00
Code
Issues
Releases
Wiki
Activity
YosysHQ.yosys
/
tests
History
Martin Povišer
b143e5678f
cellmatch: Rename the special design to
$cellmatch
2024-05-03 16:42:41 +02:00
..
aiger
read_aiger: Fix incorrect read of binary Aiger without outputs
2024-04-29 14:06:58 +01:00
arch
…
asicworld
…
bind
…
blif
…
bram
…
cxxrtl
…
errors
…
fmt
…
fsm
…
hana
…
liberty
…
lut
…
memfile
…
memlib
…
memories
…
opt
…
opt_share
…
proc
…
realmath
…
rpc
…
sat
…
select
…
share
…
sim
…
simple
…
simple_abc9
…
smv
…
sva
…
svinterfaces
…
svtypes
…
techmap
cellmatch: Rename the special design to
$cellmatch
2024-05-03 16:42:41 +02:00
tools
…
unit
…
various
add command that should not have any effect to hierarchy -generate test (this documents the current behavior, not sure if it is desired functionality)
2024-04-12 13:51:06 +02:00
verific
…
verilog
…
vloghtb
…
xprop
…
gen-tests-makefile.sh
…