Clifford Wolf 523df73145 Added support for truncating of wires to wreduce pass

2014-08-05 14:47:03 +02:00

..

bitpattern.h

Using log_assert() instead of assert()

2014-07-28 11:27:48 +02:00

calc.cc

Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespace

2014-07-31 13:19:47 +02:00

celltypes.h

Preparations for RTLIL::IdString redesign: cleanup of existing code

2014-08-02 00:45:25 +02:00

compatibility.cc

Merged OSX fixes from Siesh1oo with some modifications

2014-03-13 12:48:10 +01:00

compatibility.h

Hotfix for kernel/compatibility.h

2014-03-13 12:55:15 +01:00

consteval.h

Renamed port access function on RTLIL::Cell, added param access functions

2014-07-31 16:38:54 +02:00

driver.cc

Added logfile hash to statistics footer

2014-08-01 19:43:28 +02:00

log.cc

Fixed a va_list corruption in logv_error()

2014-08-02 21:54:30 +02:00

log.h

Improvements in new RTLIL::IdString implementation

2014-08-02 15:44:10 +02:00

modtools.h

Added support for truncating of wires to wreduce pass

2014-08-05 14:47:03 +02:00

register.cc

No implicit conversion from IdString to anything else

2014-08-02 18:58:40 +02:00

register.h

Added per-pass cpu usage statistics

2014-08-01 18:42:10 +02:00

rtlil.cc

Added support for truncating of wires to wreduce pass

2014-08-05 14:47:03 +02:00

rtlil.h

Added support for truncating of wires to wreduce pass

2014-08-05 14:47:03 +02:00

satgen.h

Renamed port access function on RTLIL::Cell, added param access functions

2014-07-31 16:38:54 +02:00

sigtools.h

Added ModIndex helper class, some changes to RTLIL::Monitor

2014-08-01 17:14:32 +02:00

toposort.h

Added topological sorting to techmap

2014-07-27 16:43:39 +02:00

yosys.cc

More bugfixes related to new RTLIL::IdString

2014-08-02 18:14:21 +02:00

yosys.h

Added ID() macro for static IdStrings

2014-08-03 14:59:13 +02:00