Krystine Sherwin b705c546ea cutpoint: Add -blackbox -instances ...

Replace module instances instead of module contents.

This fixes parametrisable width mismatch with read_verilog frontend, but not verific frontend.

2025-04-11 04:12:34 +12:00

..

cmds

design.cc: Fix selections when copying

2025-04-08 16:35:12 +12:00

equiv

mark all hash_into methods nodiscard

2025-01-14 12:39:15 +01:00

fsm

io: refactor string and file work into new unit

2025-03-19 13:43:42 +01:00

hierarchy

Reinstate #4768

2025-04-08 11:58:05 +12:00

memory

memory_libmap: update indices on design modification

2025-02-11 13:32:34 +01:00

opt

Reinstate #4768

2025-04-08 11:58:05 +12:00

pmgen

io: refactor string and file work into new unit

2025-03-19 13:43:42 +01:00

proc

mark all hash_into methods nodiscard

2025-01-14 12:39:15 +01:00

sat

cutpoint: Add -blackbox -instances

2025-04-11 04:12:34 +12:00

techmap

Merge pull request #5000 from YosysHQ/krys/re_refactor_selections

2025-04-10 16:06:36 +00:00

tests

macc: Stop using the B port

2025-01-08 13:03:35 +01:00