Marcin Kościelnicki e91368a5f4 fsm_extract: Initialize celltypes with full design. ...

Fixes #1781.

2020-03-19 18:51:21 +01:00

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cmds

Merge pull request #1774 from boqwxp/exec

2020-03-19 13:14:43 +01:00

equiv

xilinx: Add xilinx_dffopt pass (#1557)

2019-12-18 13:43:43 +01:00

fsm

fsm_extract: Initialize celltypes with full design.

2020-03-19 18:51:21 +01:00

hierarchy

Merge pull request #1519 from YosysHQ/eddie/submod_po

2020-03-03 08:19:06 -08:00

memory

Cleanup

2019-12-17 00:25:08 -08:00

opt

ystests: fix write_smt2_write_smt2_cyclic_dependency_fail

2020-02-28 12:33:55 -08:00

pmgen

Merge pull request #1657 from YosysHQ/dave/xilinx-dsp-multonly

2020-02-02 14:53:32 +00:00

proc

proc_dlatch: Add error handling for incorrect always_(ff|latch|comb) usage

2019-11-21 20:46:41 +00:00

sat

Merge pull request #1638 from YosysHQ/eddie/fix1631

2020-02-05 19:31:18 +01:00

techmap

Merge pull request #1743 from YosysHQ/eddie/abc9_keep

2020-03-11 06:32:15 -07:00

tests

Document (* gentb_skip *) attr for test_autotb

2019-09-18 12:41:35 -07:00