Icenowy Zheng c2b7ad3b28 anlogic: support BRAM mapping ...

Anlogic FPGAs all have two kinds of BRAMs, one is 9bit*1K when being
true dual port (or 18bit*512 when simple dual port), the other is
16bit*2K.

Supports mapping of these two kinds of BRAMs. 9Kbit BRAM in SDP mode and
32Kbit BRAM with 8bit width are not support yet.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>

2021-12-17 20:28:22 +08:00

..

achronix

Fixing old e-mail addresses and deadnames

2021-06-08 00:39:36 +02:00

anlogic

anlogic: support BRAM mapping

2021-12-17 20:28:22 +08:00

common

Hook up $aldff support in various passes.

2021-10-02 21:01:21 +02:00

coolrunner2

Blackbox all whiteboxes after synthesis

2021-03-17 21:07:20 +00:00

easic

Fixing old e-mail addresses and deadnames

2021-06-08 00:39:36 +02:00

ecp5

ecp5: Add support for mapping aldff.

2021-10-27 16:18:05 +02:00

efinix

Fixing old e-mail addresses and deadnames

2021-06-08 00:39:36 +02:00

gatemate

synth_gatemate Revert cascade A/B port mixup

2021-11-13 21:53:25 +01:00

gowin

iopadmap: Add native support for negative-polarity output enable.

2021-11-09 15:40:16 +01:00

greenpak4

Fixing old e-mail addresses and deadnames

2021-06-08 00:39:36 +02:00

ice40

Fixed Verific parser error in ice40 cell library

2021-10-19 12:33:18 +02:00

intel

Fixing old e-mail addresses and deadnames

2021-06-08 00:39:36 +02:00

intel_alm

intel_alm: preliminary Arria V support

2021-11-25 17:20:36 +01:00

machxo2

iopadmap: Add native support for negative-polarity output enable.

2021-11-09 15:40:16 +01:00

nexus

iopadmap: Add native support for negative-polarity output enable.

2021-11-09 15:40:16 +01:00

quicklogic

quicklogic: ABC9 synthesis

2021-04-17 20:54:58 +02:00

sf2

Fixing old e-mail addresses and deadnames

2021-06-08 00:39:36 +02:00

xilinx

iopadmap: Add native support for negative-polarity output enable.

2021-11-09 15:40:16 +01:00

.gitignore

added .gitignore files

2013-01-05 11:19:11 +01:00