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c5971cb16cdc934b9d2c615e37d0eed4cc3b5c8d
YosysHQ.yosys
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arch
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Eddie Hung
7939727d14
Merge pull request
#1660
from YosysHQ/eddie/abc9_unpermute_luts
...
Unpermute LUT ordering for ice40/ecp5/xilinx
2020-01-28 11:55:51 -08:00
..
anlogic
Call equiv_opt with -multiclock and -assert
2019-12-31 18:39:32 -08:00
common
Merge pull request
#1574
from YosysHQ/eddie/xilinx_lutram
2019-12-16 21:48:21 -08:00
ecp5
Add
#1630
testcase
2020-01-13 21:27:53 -08:00
efinix
Call equiv_opt with -multiclock and -assert
2019-12-31 18:39:32 -08:00
gowin
Call equiv_opt with -multiclock and -assert
2019-12-31 18:39:32 -08:00
ice40
Import tests from
#1628
2020-01-27 13:56:16 -08:00
xilinx
Merge pull request
#1573
from YosysHQ/eddie/xilinx_tristate
2020-01-28 17:24:54 +01:00
run-test.sh
Add simcells.v, simlib.v, and some output
2019-06-27 11:13:49 -07:00
