Clifford Wolf cd5767d61b Added scc pass (find logic loops)

2013-03-15 10:24:08 +01:00

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abc

Added [[CITE]] tags to abc and fsm_extract passes

2013-03-15 10:23:02 +01:00

dfflibmap

Added more help messages (extract, abc, dfflibmap)

2013-02-28 11:14:59 +01:00

extract

Split extract -attr into extract -cell_attr and -wire_attr

2013-03-08 08:19:24 +01:00

fsm

Added [[CITE]] tags to abc and fsm_extract passes

2013-03-15 10:23:02 +01:00

hierarchy

Implemented general handler for selection arguments

2013-03-03 10:05:37 +01:00

memory

Added help messages to memory_* passes

2013-03-01 10:17:35 +01:00

opt

Fixed detection of public wires in opt_rmunused

2013-03-10 14:20:03 +01:00

proc

Added help messages to proc_* passes

2013-03-01 09:26:29 +01:00

scc

Added scc pass (find logic loops)

2013-03-15 10:24:08 +01:00

submod

Added more help messages

2013-03-01 00:36:19 +01:00

techmap

Automatically select new objects in abc and techmap passes

2013-03-08 09:16:25 +01:00