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YosysHQ.yosys/tests/arch
Eddie Hung de79978372 xilinx: do not make DSP48E1 a whitebox for ABC9 by default (#2325)
* xilinx: eliminate SCCs from DSP48E1 model

* xilinx: add SCC test for DSP48E1

* Update techlibs/xilinx/cells_sim.v

* xilinx: Gate DSP48E1 being a whitebox behind ALLOW_WHITEBOX_DSP48E1

Have a test that checks it works through ABC9 when enabled
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