github.com/YosysHQ.yosys
1
0
Fork 0
mirror of synced 2026-04-27 20:49:44 +00:00
Code Issues Releases Wiki Activity
Files
db6d78a1865456076fccfb44d40fa9a4adecd23b
YosysHQ.yosys/techlibs/altera_intel/max10
History
Larry Doolittle 2021ddecb3 Squelch trailing whitespace
2017-04-12 15:11:09 +02:00
..
cells_arith_max10.v
Squelch trailing whitespace
2017-04-12 15:11:09 +02:00
cells_comb_max10.v
Squelch trailing whitespace
2017-04-12 15:11:09 +02:00
cells_map_max10.v
Squelch trailing whitespace
2017-04-12 15:11:09 +02:00