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dc6e63d8cd138ef36ac8cbc892c2f262b7bf01c5
YosysHQ.yosys
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techlibs
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anlogic
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Miodrag Milanovic
43030db5ff
Leave only real black box cells
2018-12-02 11:57:50 +01:00
..
anlogic_eqn.cc
Initial support for Anlogic FPGA
2018-12-01 18:28:54 +01:00
arith_map.v
Initial support for Anlogic FPGA
2018-12-01 18:28:54 +01:00
cells_map.v
Initial support for Anlogic FPGA
2018-12-01 18:28:54 +01:00
cells_sim.v
Initial support for Anlogic FPGA
2018-12-01 18:28:54 +01:00
eagle_bb.v
Leave only real black box cells
2018-12-02 11:57:50 +01:00
Makefile.inc
Initial support for Anlogic FPGA
2018-12-01 18:28:54 +01:00
synth_anlogic.cc
Initial support for Anlogic FPGA
2018-12-01 18:28:54 +01:00