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ddcfc99f8c23a2a7e9f41eeed5504e10215bee14
YosysHQ.yosys
/
frontends
/
verilog
History
Clifford Wolf
e2e092b144
Added read_verilog -nodpi
2015-09-23 08:23:38 +02:00
..
.gitignore
Updated .gitignore file for ilang and verilog frontends
2014-10-15 01:14:38 +02:00
const2ast.cc
Fixed segfault on invalid verilog constant 1'b_
2015-09-22 08:13:09 +02:00
Makefile.inc
Adjust makefiles to work with out-of-tree builds
2015-08-12 15:04:44 +02:00
preproc.cc
Fixed trailing whitespaces
2015-07-02 11:14:30 +02:00
verilog_frontend.cc
Added read_verilog -nodpi
2015-09-23 08:23:38 +02:00
verilog_frontend.h
Fixed trailing whitespaces
2015-07-02 11:14:30 +02:00
verilog_lexer.l
Fixed support for $write system task
2015-09-23 07:10:56 +02:00
verilog_parser.y
Fixed detection of "task foo(bar);" syntax error
2015-09-22 21:34:21 +02:00