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YosysHQ.yosys/frontends
Gary Wong e17ed5df88 verilog: add support for SystemVerilog string literals.
Differences are new escape sequences (including escaped newline
continuations and hex escapes) and triple-quoted literals.
2025-07-10 23:28:22 +02:00
..
2024-12-10 14:27:55 +01:00