1
0
mirror of synced 2026-02-02 15:11:06 +00:00
Files
YosysHQ.yosys/techlibs
Martin Povišer ee3a4ce14d synth_lattice: Merge NOT gates on DFF control signals
`dfflegalize` will emit NOT gates to drive control signals on flip-flops
when mapping to supported flip-flop polarities. Typically in a design
this will produce a number of NOT gates driven by the same signal. For
one reason or another ABC doesn't fully cancel this redundancy during
LUT mapping. Insert an explicit `opt_merge` pass to improve synthesis
QoR.
2023-11-07 16:21:39 +01:00
..
2022-09-21 15:46:43 +02:00
2022-05-18 17:32:56 +02:00
2022-05-18 17:32:56 +02:00
2023-04-12 18:42:09 +02:00
2022-09-21 15:46:43 +02:00
2013-01-05 11:19:11 +01:00