This website requires JavaScript.
Explore
Help
Register
Sign In
github.com
/
YosysHQ.yosys
Watch
1
Star
0
Fork
0
You've already forked YosysHQ.yosys
mirror of
synced
2026-04-18 10:26:18 +00:00
Code
Issues
Releases
Wiki
Activity
Files
eef32195bd1afb4f029bf3039377e65f0beabac2
YosysHQ.yosys
/
techlibs
/
efinix
History
Miodrag Milanovic
44c3472b9f
FF should be initialized to 0
2019-10-04 13:27:10 +02:00
..
arith_map.v
Fix formating
2019-08-11 17:05:24 +02:00
bram.txt
…
brams_map.v
one bit enable signal
2019-08-11 13:59:39 +02:00
cells_map.v
Add missing latch mapping
2019-10-04 12:58:11 +02:00
cells_sim.v
FF should be initialized to 0
2019-10-04 13:27:10 +02:00
efinix_fixcarry.cc
Adding new pass to fix carry chain
2019-08-11 10:17:49 +02:00
efinix_gbuf.cc
…
Makefile.inc
Fix missing newline at end of file
2019-08-22 18:06:36 +02:00
synth_efinix.cc
Replaced custom step with setundef
2019-08-11 11:01:46 +02:00