Emil J. Tywoniak b2fe335b2d dfflibmap: fix next_state inversion propagation for DFF flops by inverting reset value polarity

2025-10-28 13:56:28 +01:00

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abc9.ys

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adff2dff.ys

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aigmap.ys

Adjust operation naming in aigmap test

2024-09-17 13:55:58 +02:00

autopurge.ys

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bmuxmap_pmux.ys

Remove references to ilang

2024-11-05 12:36:31 +13:00

booth_map_script.ys_

renamed passname to booth, replaced connect_sigSpecToWire with connect, updated test script

2023-09-08 15:34:56 -07:00

booth.ys

booth: Map simple $macc instances too

2024-12-01 16:00:04 +01:00

buf.ys

opt_clean, simplemap: Add $buf handling

2025-03-07 16:08:38 +01:00

bufnorm.ys

tests/bufnorm: add test for bufnorm of constant

2024-11-07 12:55:50 +01:00

bug2183.ys

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bug2321.ys

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bug2332.ys

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bug2759.ys

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bug2972.ys

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cellmatch.ys

cellmatch: Rename -lut_attrs to -derive_luts; document option

2024-11-04 14:28:40 +01:00

cellname.ys

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clkbufmap.ys

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clockgate_neg.lib

libparse: add LibertyMergedCells, enable multiple -liberty args for dfflibmap and clockgate

2024-12-03 17:36:00 +01:00

clockgate_pos.lib

libparse: add LibertyMergedCells, enable multiple -liberty args for dfflibmap and clockgate

2024-12-03 17:36:00 +01:00

clockgate.lib

clockgate: shuffle test liberty to exercise comparison better

2024-11-18 12:48:50 +01:00

clockgate.ys

clockgate: support liberty filename globbing

2025-09-24 11:41:51 +02:00

cmp2lcu.ys

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constmap.ys

Add check at constmap and merge test

2025-04-14 11:44:52 +01:00

dff2ff.ys

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dffinit.ys

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dfflegalize_adff_init.ys

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dfflegalize_adff.ys

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dfflegalize_adlatch_init.ys

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dfflegalize_adlatch.ys

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dfflegalize_aldff_init.ys

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dfflegalize_aldff.ys

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dfflegalize_dff_init.ys

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dfflegalize_dff.ys

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dfflegalize_dffsr_init.ys

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dfflegalize_dffsr.ys

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dfflegalize_dlatch_const.ys

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dfflegalize_dlatch_init.ys

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dfflegalize_dlatch.ys

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dfflegalize_dlatchsr_init.ys

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dfflegalize_dlatchsr.ys

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dfflegalize_inv.ys

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dfflegalize_mince.ys

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dfflegalize_minsrst.ys

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dfflegalize_sr_init.ys

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dfflegalize_sr.ys

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dfflibmap_dff_not_next.lib

dfflibmap: fix next_state inversion propagation for DFF flops by inverting reset value polarity

2025-10-28 13:56:28 +01:00

dfflibmap_dffn_dffe.lib

tests: fix dfflibmap test - false negative conflict multiple -liberty vs enable inference

2024-12-10 15:48:23 +01:00

dfflibmap_dffr_not_next.lib

fixup! dfflibmap: propagate negated next_state to output correctly

2025-06-24 12:31:30 +02:00

dfflibmap_dffsr_mixedpol.lib

dfflibmap: test negated state next_state with mixed polarities

2025-07-10 18:54:43 +02:00

dfflibmap_dffsr_not_next.lib

dfflibmap: propagate negated next_state to output correctly

2025-06-24 12:01:12 +02:00

dfflibmap_dffsr.lib

libparse: add LibertyMergedCells, enable multiple -liberty args for dfflibmap and clockgate

2024-12-03 17:36:00 +01:00

dfflibmap_formal.ys

dfflibmap: fix next_state inversion propagation for DFF flops by inverting reset value polarity

2025-10-28 13:56:28 +01:00

dfflibmap-sim.v

dfflibmap: cover enable inference with test

2024-12-09 14:18:08 +01:00

dfflibmap.lib

dfflibmap: show dffe inference is broken by space ANDs

2025-07-11 00:33:01 +02:00

dfflibmap.ys

dfflibmap: support liberty filename globbing

2025-09-24 11:41:51 +02:00

dffunmap.ys

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extractinv.ys

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han-carlson.tcl

techmap: test consistently with other equiv_make tests

2024-11-29 00:15:02 +01:00

iopadmap.ys

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kogge-stone.tcl

techmap: test consistently with other equiv_make tests

2024-11-29 00:15:02 +01:00

lcu_refined.v

techmap: wrap builtin $lcu as golden module in PPA tests

2024-11-29 00:13:21 +01:00

mem_simple_4x1_cells.v

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mem_simple_4x1_map.v

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mem_simple_4x1_runtest.sh

tests: use /usr/bin/env for bash.

2023-08-12 11:59:39 +10:00

mem_simple_4x1_tb.v

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mem_simple_4x1_uut.v

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pmux2mux.ys

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recursive_map.v

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recursive_runtest.sh

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recursive.v

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run-test.sh

test: restore verific handling, nicer naming

2024-12-13 10:24:47 +01:00

shiftx2mux.ys

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sklansky.tcl

techmap: add a Sklansky option for $lcu mapping

2024-12-02 11:34:58 +01:00

techmap_chtype.ys

chtype: replace publish pass with chtype -publish_icells

2025-10-14 15:01:48 +02:00

techmap_replace.ys

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wireinit.ys

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zinit.ys

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