Emil J. Tywoniak 785bd44da7 rtlil: represent Const strings as std::string

2024-10-14 06:28:12 +02:00

..

.gitignore

gatemate: Add LUT tree library script

2022-06-27 10:09:48 +01:00

arith_map.v

synth_gatemate: Initial implementation

2021-11-13 21:53:25 +01:00

brams_init_20.vh

synth_gatemate: Initial implementation

2021-11-13 21:53:25 +01:00

brams_init_40.vh

synth_gatemate: Revise block RAM read modes and initialization

2021-11-13 21:53:25 +01:00

brams_map.v

gatemate: Fix minor issues with memory_libmap (#3343)

2022-05-27 23:35:26 +02:00

brams.txt

gatemate: Fix minor issues with memory_libmap (#3343)

2022-05-27 23:35:26 +02:00

cells_bb.v

gatemate: Add CC_FIFO_40K simulation model

2023-05-30 09:06:23 +02:00

cells_sim.v

gatemate: Prevent implicit declaration of ram_{we,en}

2023-06-05 19:08:44 +02:00

gatemate_foldinv.cc

rtlil: represent Const strings as std::string

2024-10-14 06:28:12 +02:00

inv_map.v

gatemate: Add LUT tree library script

2022-06-27 10:09:48 +01:00

lut_map.v

synth_gatemate: Initial implementation

2021-11-13 21:53:25 +01:00

make_lut_tree_lib.py

gatemate: Add LUT tree library script

2022-06-27 10:09:48 +01:00

Makefile.inc

gatemate: Add LUT tree library script

2022-06-27 10:09:48 +01:00

mul_map.v

synth_gatemate: Rename multiplier factor parameters

2021-11-13 21:53:25 +01:00

mux_map.v

synth_gatemate: Initial implementation

2021-11-13 21:53:25 +01:00

reg_map.v

gatemate: Enable register initialization

2023-02-15 17:29:01 +01:00

synth_gatemate.cc

gatemate: Enable register initialization

2023-02-15 17:29:01 +01:00