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f8c065ed1cb17057a8317ae5bd47500a6be60c5c
YosysHQ.yosys
/
frontends
/
verilog
History
Peter Crozier
f8c065ed1c
Inline productions to follow house style.
2020-03-27 16:21:45 +00:00
..
.gitignore
Add "make coverage"
2018-08-27 14:22:21 +02:00
const2ast.cc
Fix handling of z_digit "?" and fix optimization of cmp with "z"
2019-09-13 13:39:39 +02:00
Makefile.inc
Add one mode dependency
2020-03-19 16:53:40 +01:00
preproc.cc
Fixed some missing "verilog_" in documentation
2019-12-13 10:17:05 -03:00
verilog_frontend.cc
Support module/package/interface/block scope for typedef names.
2020-03-23 20:07:22 +00:00
verilog_frontend.h
Support module/package/interface/block scope for typedef names.
2020-03-23 20:07:22 +00:00
verilog_lexer.l
Error duplicate declarations of a typedef name in the same scope.
2020-03-24 14:35:21 +00:00
verilog_parser.y
Inline productions to follow house style.
2020-03-27 16:21:45 +00:00