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fbd52ec6dd610966111ebf2ed0e31548aead3dc6
YosysHQ.yosys
/
techlibs
/
ice40
History
Clifford Wolf
81bdf0ad0f
iCE40 flow is not experimental anymore
2016-11-01 11:32:02 +01:00
..
tests
…
.gitignore
…
arith_map.v
…
brams_init.py
…
brams_map.v
…
brams.txt
…
cells_map.v
…
cells_sim.v
…
ice40_ffinit.cc
Minor fixes in ice40_ff* passes for sloppy SB_DFF instantiations
2016-07-08 14:41:36 +02:00
ice40_ffssr.cc
Minor fixes in ice40_ff* passes for sloppy SB_DFF instantiations
2016-07-08 14:41:36 +02:00
ice40_opt.cc
Fixed ice40_opt lut unmapping, added "ice40_opt -unlut"
2016-05-06 14:32:32 +02:00
latches_map.v
Added synth_ice40 support for latches via logic loops
2016-05-06 23:02:37 +02:00
Makefile.inc
Added synth_ice40 support for latches via logic loops
2016-05-06 23:02:37 +02:00
synth_ice40.cc
iCE40 flow is not experimental anymore
2016-11-01 11:32:02 +01:00
