Martin Povišer fed2720999 synth_lattice: Optimize flip-flop memories better ...

After `memory_map` maps memories to flip-flops we need to let `opt`
remove undef muxes, otherwise we block enable/reset signal inference by
`opt_dff` which is in detriment to QoR.

2023-11-07 16:29:56 +01:00

..

achronix

Test fixes for latest iverilog

2022-09-21 15:46:43 +02:00

anlogic

anlogic: Use memory_libmap pass.

2022-05-18 17:32:56 +02:00

common

Merge pull request #3924 from andyfox-rushc/master

2023-09-18 16:46:59 +02:00

coolrunner2

Blackbox all whiteboxes after synthesis

2021-03-17 21:07:20 +00:00

easic

Fixing old e-mail addresses and deadnames

2021-06-08 00:39:36 +02:00

ecp5

Revert "ice40, ecp5: enable ABC9 by default"

2023-11-03 14:52:52 +00:00

efinix

efinix: Use memory_libmap pass.

2022-05-18 17:32:56 +02:00

fabulous

fabulous: Add support for LUT6s

2023-04-12 18:42:09 +02:00

gatemate

gatemate: Prevent implicit declaration of ram_{we,en}

2023-06-05 19:08:44 +02:00

gowin

gowin: fix abc9 attributes and specify blocks

2023-10-04 00:16:10 +01:00

greenpak4

Fixing old e-mail addresses and deadnames

2021-06-08 00:39:36 +02:00

ice40

Revert "ice40, ecp5: enable ABC9 by default"

2023-11-03 14:52:52 +00:00

intel

Fitting help messages to 80 character width

2022-08-24 10:40:57 +12:00

intel_alm

intel_alm: re-enable 8x40-bit M10K support

2023-05-29 06:42:03 +01:00

lattice

synth_lattice: Optimize flip-flop memories better

2023-11-07 16:29:56 +01:00

nexus

nexus: Fix BRAM write enable in PDP mode

2023-01-04 17:59:36 +01:00

quicklogic

Fitting help messages to 80 character width

2022-08-24 10:40:57 +12:00

sf2

Test fixes for latest iverilog

2022-09-21 15:46:43 +02:00

xilinx

Update Xilinx cell definitions, fixes #3699

2023-03-23 09:44:36 +01:00

.gitignore

…