Robert O'Callahan 8b75c06141 Add a general tests/.gitignore and remove redundant entries in subdirectory .gitignore files.

2025-07-22 10:38:38 +00:00

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blackbox_empty.ys

Add verific verilog test cases for blackboxes

2024-12-06 16:13:25 +01:00

blackbox_ql.ys

Add verific verilog test cases for blackboxes

2024-12-06 16:13:25 +01:00

blackbox.ys

verific: fix blackbox regression and add test case

2024-11-08 14:57:04 +01:00

bounds.sv

bound attributes: handle vhdl null ranges

2024-12-12 11:42:39 +01:00

bounds.vhd

bound attributes: handle vhdl null ranges

2024-12-12 11:42:39 +01:00

bounds.ys

bound attributes: handle vhdl null ranges

2024-12-12 11:42:39 +01:00

case.sv

Add test example

2023-02-27 09:24:04 +01:00

case.ys

Add test example

2023-02-27 09:24:04 +01:00

chformal.ys

tests/verific: Add chformal tests

2025-06-14 11:06:38 +12:00

clocking.ys

Fix verific clocking when no driver exist

2024-01-18 08:47:04 +01:00

enum_values.sv

verific: Fix enum_values support and signed attribute values

2023-03-15 09:51:36 +01:00

enum_values.ys

verific: Fix enum_values support and signed attribute values

2023-03-15 09:51:36 +01:00

memory_semantics.ys

Add -nordff to test

2024-02-06 10:36:30 +01:00

range_case.sv

Added ranged case check

2023-02-27 09:24:04 +01:00

range_case.ys

Added ranged case check

2023-02-27 09:24:04 +01:00

rom_case.ys

verific: import attributes on ports

2023-10-20 18:31:41 +02:00

run-test.sh

tests/verific: Don't ASAN verific

2025-06-28 11:33:18 +12:00

setenv.flist

add setenv pass

2024-12-06 11:25:43 +01:00

setenv.ys

add setenv pass

2024-12-06 11:25:43 +01:00