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mirror of https://github.com/aap/pdp6.git synced 2026-01-29 05:11:50 +00:00

membus pulses; pt thread

This commit is contained in:
aap
2016-10-25 20:30:28 +02:00
parent 2a37a8f74d
commit 2c3242fd4d
6 changed files with 90 additions and 66 deletions

View File

@@ -3061,12 +3061,15 @@ aprmain(void *p)
}
iobus1_last = iobus1;
membus0_last = membus0;
for(i = 0; i < apr->ncurpulses; i++)
apr->clist[i](apr);
/* find out which bits were turned on */
iobus1_pulse = (iobus1_last ^ iobus1) & iobus1;
iobus1_pulse &= ~037777000177LL;
membus0_pulse = (membus0_last ^ membus0) & membus0;
/* This is simplified, we have no IOT RESET,
* IOT INIT SET UP or IOT FINAL SETUP really.
@@ -3112,15 +3115,12 @@ aprmain(void *p)
/* Pulses to memory */
if(membus0 & (MEMBUS_WR_RS | MEMBUS_RQ_CYC)){
if(membus0_pulse & (MEMBUS_WR_RS | MEMBUS_RQ_CYC)){
wakemem();
/* Normally this should still be asserted but it
* is interpreted as a pulse every loop iteration here.
* Clearing it is a hack */
membus0 &= ~MEMBUS_RQ_CYC;
membus0 &= ~MEMBUS_WR_RS;
}
/* Pulses from memory */
/* Pulses from memory */
if(membus0 & MEMBUS_MAI_ADDR_ACK){
membus0 &= ~MEMBUS_MAI_ADDR_ACK;
apr->extpulse &= ~EXT_NONEXIT_MEM;

View File

@@ -79,7 +79,7 @@ mustloadimg(const char *path)
{
SDL_Surface *s;
s = IMG_Load(path);
if(s == NULL)
if(s == nil)
err("Couldn't load %s", path);
return s;
}
@@ -146,7 +146,7 @@ poweron(void)
{
pthread_t apr_thread;
apr.sw_power = 1;
pthread_create(&apr_thread, NULL, aprmain, &apr);
pthread_create(&apr_thread, nil, aprmain, &apr);
}
#define KEYPULSE(k) (apr.k && !oldapr.k)

View File

@@ -6,6 +6,7 @@ word memory[256*1024];
hword maxmem = 64*1024;
word fmem[16];
word membus0, membus1;
word membus0_last, membus0_pulse;
word *hold;
void
@@ -71,7 +72,7 @@ void
wakemem(void)
{
hword a;
if(membus0 & MEMBUS_RQ_CYC){
if(membus0_pulse & MEMBUS_RQ_CYC){
a = membus0>>4 & 037777;
if(membus0 & MEMBUS_MA21_1) a |= 0040000;
if(membus0 & MEMBUS_MA20_1) a |= 0100000;
@@ -87,12 +88,11 @@ wakemem(void)
membus1 = *hold & FW;
membus0 |= MEMBUS_MAI_RD_RS;
if(!(membus0 & MEMBUS_WR_RQ))
hold = NULL;
hold = nil;
}
}
if(membus0 & MEMBUS_WR_RS && hold){
*hold = membus1 & FW;
membus0 &= ~MEMBUS_WR_RS;
hold = NULL;
hold = nil;
}
}

View File

@@ -246,6 +246,9 @@ enum {
};
/* 0 is cable 1 & 2 (above bits); 1 is cable 3 & 4 (data) */
extern word membus0, membus1;
/* record the state of membus0 of the last pulse step
* to recognize pulses or edges */
extern word membus0_last, membus0_pulse;
// 7-10
enum {

115
src/pt.c
View File

@@ -7,6 +7,8 @@
#include <pthread.h>
#include <poll.h>
/* TODO? implement motor delays */
Ptp ptp;
Ptr ptr;
@@ -21,54 +23,6 @@ recalc_ptp_req(void)
}
}
static void
wake_ptp(void)
{
if(IOB_RESET){
ptp.pia = 0;
ptp.busy = 0;
ptp.flag = 0;
ptp.b = 0;
}
if(iodev == PTP){
if(IOB_STATUS){
if(ptp.b) iobus0 |= F30;
if(ptp.busy) iobus0 |= F31;
if(ptp.flag) iobus0 |= F32;
iobus0 |= ptp.pia & 7;
}
if(IOB_CONO_SET){
if(iobus0 & F30) ptp.b = 1;
if(iobus0 & F31) ptp.busy = 1;
if(iobus0 & F32) ptp.flag = 1;
ptp.pia |= iobus0 & 7;
}
if(IOB_CONO_CLEAR){
ptp.pia = 0;
ptp.busy = 0;
ptp.flag = 0;
ptp.b = 0;
}
if(IOB_DATAO_CLEAR){
ptp.ptp = 0;
ptp.busy = 1;
ptp.flag = 0;
}
if(IOB_DATAO_SET){
ptp.ptp = iobus0 & 0377;
if(ptp.fp){
if(ptp.b)
putc((ptp.ptp & 077) | 0200, ptp.fp);
else
putc(ptp.ptp, ptp.fp);
}
ptp.busy = 0;
ptp.flag = 1;
}
}
recalc_ptp_req();
}
void
recalc_ptr_req(void)
{
@@ -80,16 +34,32 @@ recalc_ptr_req(void)
}
}
/* We have to punch after DATAO SET has happened. But BUSY is set by
* DATAO CLEAR. So we use this to record when SET has happened */
int waitdatao;
void*
ptrthread(void *arg)
ptthread(void *arg)
{
int c;
for(;;){
if(ptp.busy && waitdatao){
if(ptp.fp){
if(ptp.b)
putc((ptp.ptp & 077) | 0200, ptp.fp);
else
putc(ptp.ptp, ptp.fp);
fflush(ptp.fp);
}
ptp.busy = 0;
ptp.flag = 1;
recalc_ptp_req();
}
if(ptr.busy && ptr.motor_on){
// PTR CLR
ptr.sr = 0;
ptr.ptr = 0;
next:
if(ptr.fp)
c = getc(ptr.fp);
@@ -117,6 +87,48 @@ ptrthread(void *arg)
return nil;
}
static void
wake_ptp(void)
{
if(IOB_RESET){
ptp.pia = 0;
ptp.busy = 0;
ptp.flag = 0;
ptp.b = 0;
}
if(iodev == PTP){
if(IOB_STATUS){
if(ptp.b) iobus0 |= F30;
if(ptp.busy) iobus0 |= F31;
if(ptp.flag) iobus0 |= F32;
iobus0 |= ptp.pia & 7;
}
if(IOB_CONO_CLEAR){
ptp.pia = 0;
ptp.busy = 0;
ptp.flag = 0;
ptp.b = 0;
}
if(IOB_CONO_SET){
if(iobus0 & F30) ptp.b = 1;
if(iobus0 & F31) ptp.busy = 1;
if(iobus0 & F32) ptp.flag = 1;
ptp.pia |= iobus0 & 7;
}
if(IOB_DATAO_CLEAR){
ptp.ptp = 0;
ptp.busy = 1;
ptp.flag = 0;
waitdatao = 0;
}
if(IOB_DATAO_SET){
ptp.ptp = iobus0 & 0377;
waitdatao = 1;
}
}
recalc_ptp_req();
}
static void
wake_ptr(void)
{
@@ -137,7 +149,6 @@ wake_ptr(void)
}
if(IOB_DATAI){
iobus0 |= ptr.ptr;
debug(" PTR: %012lo\n", iobus0);
ptr.flag = 0;
// actually when DATAI is negated again
ptr.busy = 1;
@@ -178,7 +189,7 @@ initpt(void)
iobusmap[PTP] = wake_ptp;
ioreq[PTR] = 0;
iobusmap[PTR] = wake_ptr;
pthread_create(&thread_id, nil, ptrthread, nil);
pthread_create(&thread_id, nil, ptthread, nil);
ptr.fp = fopen("../code/test.rim", "rb");
ptp.fp = fopen("../code/ptp.out", "wb");