diff --git a/apr.c b/apr.c
index dddce80..ce48595 100644
--- a/apr.c
+++ b/apr.c
@@ -455,6 +455,8 @@ pulse(sht1a);
 pulse(cht3);
 pulse(cht3a);
 pulse(cht8a);
+pulse(lct0a);
+pulse(dct0a);
 pulse(pir_stb);
 
 // TODO: find A LONG, it probably doesn't exist
@@ -498,6 +500,7 @@ pulse(mp_clr){
 	apr->chf4 = 0;
 	apr->chf5 = 0;
 	apr->chf6 = 0;
+	apr->lcf1 = 0;		// 6-20
 	apr->shf1 = 0;		// 6-20
 }
 
@@ -544,6 +547,7 @@ pulse(mr_clr){
 	apr->blt_f3a = 0;	// 6-18
 	apr->blt_f5a = 0;	// 6-18
 	apr->uuo_f1 = 0;	// 5-10
+	apr->dcf1 = 0;		// 6-20
 
 	// EX UUO SYNC
 	decodeir(apr);
@@ -870,6 +874,8 @@ pulse(sct2){
 	trace("SCT2\n");
 	if(apr->shf1) nextpulse(apr, sht1a);	// 6-20
 	if(apr->chf4) nextpulse(apr, cht8a);	// 6-19
+	if(apr->lcf1) nextpulse(apr, lct0a);	// 6-20
+	if(apr->dcf1) nextpulse(apr, dct0a);	// 6-20
 }
 
 pulse(sct1){
@@ -938,6 +944,13 @@ pulse(sct1){
 	}
 	if(apr->chf4)
 		MQ_SH_LT;
+	if(apr->lcf1)
+		AR_SH_RT;
+	if(apr->dcf1){
+		AR_SH_LT;
+		MQ_SH_LT;
+	}
+
 	if(!(apr->mb & F18) && (apr->inst == ASH || apr->inst == ASHC) && AR0_XOR_AR1){
 		apr->ar_ov_flag = 1;			// 6-10
 		recalc_cpa_req(apr);
@@ -1007,11 +1020,64 @@ pulse(sht0){
  * Character subroutines
  */
 
+pulse(dct3){
+	trace("DCT3\n");
+	apr->mb &= apr->ar;		// 6-3
+	apr->chf7 = 0;			// 6-19
+	nextpulse(apr, et10);		// 5-5
+}
+
+pulse(dct2){
+	trace("DCT2\n");
+	apr->ar = ~apr->ar & FW;	// 6-17
+	nextpulse(apr, dct3);		// 6-20
+}
+
+pulse(dct1){
+	trace("DCT1\n");
+	apr->ar &= apr->mb;		// 6-8
+	apr->mb = apr->mq;		// 6-17
+	nextpulse(apr, dct2);		// 6-20
+}
+
+pulse(dct0a){
+	trace("DCT0A\n");
+	apr->dcf1 = 0;			// 6-20
+	swap(&apr->mb, &apr->mq);	// 6-17, 6-13 (dct0b)
+	apr->ar = ~apr->ar & FW;	// 6-17
+	nextpulse(apr, dct1);		// 6-20
+}
+
+pulse(dct0){
+	trace("DCT0\n");
+	apr->dcf1 = 1;			// 6-20
+	SC_COM;				// 6-15
+	nextpulse(apr, sct0);		// 6-16
+}
+
+pulse(lct0a){
+	trace("LCT0A\n");
+	apr->lcf1 = 0;			// 6-20
+	apr->ar &= apr->mb;		// 6-8
+	apr->chf7 = 0;			// 6-19
+	nextpulse(apr, et10);		// 5-5
+}
+
+pulse(lct0){
+	trace("LCT0\n");
+	apr->ar = apr->mb;		// 6-8
+	apr->mb = apr->mq;		// 6-17
+	SC_COM;				// 6-15
+	apr->lcf1 = 1;			// 6-20
+	nextpulse(apr, sct0);		// 6-16
+}
+
 pulse(cht9){
 	trace("CHT9\n");
 	apr->sc = apr->fe;		// 6-15
 	apr->chf5 = 1;			// 6-19
 	apr->chf7 = 1;			// 6-19
+	nextpulse(apr, at0);		// 5-3
 }
 
 pulse(cht8a){
@@ -1593,6 +1659,10 @@ pulse(et0){
 		nextpulse(apr, cht1);		// 6-19
 	if(CH_N_INC_OP)
 		nextpulse(apr, cht6);		// 6-19
+	if(CH_LOAD)
+		nextpulse(apr, lct0);		// 6-20
+	if(CH_DEP)
+		nextpulse(apr, dct0);		// 6-20
 	// TODO: subroutines
 }
 
diff --git a/main.c b/main.c
index cd3a197..58e6591 100644
--- a/main.c
+++ b/main.c
@@ -285,7 +285,6 @@ Light ind_lights[] = {
 	{ lampsurf, { 1186, 146, 12, 12 }, 0 },
 	{ lampsurf, { 1200, 146, 12, 12 }, 0 },
 	{ lampsurf, { 1214, 146, 12, 12 }, 0 },
-	/* flags */
 	/* FE */
 	{ lampsurf, { 539, 161, 14, 22 }, 0 },
 	{ lampsurf, { 451,  42, 14, 22 }, 0 },
@@ -316,9 +315,79 @@ Light ind_lights[] = {
 	{ lampsurf, {  55, 127, 14, 22 }, 0 },
 	{ lampsurf, {  55, 144, 14, 22 }, 0 },
 	{ lampsurf, {  55, 161, 14, 22 }, 0 },
-	/* */
+	/* column 2 */
+	{ lampsurf, {  99,  42, 14, 22 }, 0 },
+	{ lampsurf, {  99,  59, 14, 22 }, 0 },
+	{ lampsurf, {  99,  76, 14, 22 }, 0 },
+	{ lampsurf, {  99,  93, 14, 22 }, 0 },
+	{ lampsurf, {  99, 110, 14, 22 }, 0 },
+	{ lampsurf, {  99, 127, 14, 22 }, 0 },
+	{ lampsurf, {  99, 144, 14, 22 }, 0 },
+	{ lampsurf, {  99, 161, 14, 22 }, 0 },
+	/* column 3 */
+	{ lampsurf, { 143,  42, 14, 22 }, 0 },
+	{ lampsurf, { 143,  59, 14, 22 }, 0 },
+	{ lampsurf, { 143,  76, 14, 22 }, 0 },
+	{ lampsurf, { 143,  93, 14, 22 }, 0 },
+	{ lampsurf, { 143, 110, 14, 22 }, 0 },
+	{ lampsurf, { 143, 127, 14, 22 }, 0 },
+	{ lampsurf, { 143, 144, 14, 22 }, 0 },
+	{ lampsurf, { 143, 162, 14, 22 }, 0 },
+	/* column 4 */
+	{ lampsurf, { 187,  42, 14, 22 }, 0 },
+	{ lampsurf, { 187,  59, 14, 22 }, 0 },
+	{ lampsurf, { 187,  76, 14, 22 }, 0 },
+	{ lampsurf, { 187,  93, 14, 22 }, 0 },
+	{ lampsurf, { 187, 110, 14, 22 }, 0 },
+	{ lampsurf, { 187, 127, 14, 22 }, 0 },
+	{ lampsurf, { 187, 144, 14, 22 }, 0 },
+	{ lampsurf, { 187, 162, 14, 22 }, 0 },
+	/* column 5 */
+	{ lampsurf, { 231,  42, 14, 22 }, 0 },
+	{ lampsurf, { 231,  59, 14, 22 }, 0 },
+	{ lampsurf, { 231,  76, 14, 22 }, 0 },
+	{ lampsurf, { 231,  93, 14, 22 }, 0 },
+	{ lampsurf, { 231, 110, 14, 22 }, 0 },
+	{ lampsurf, { 231, 127, 14, 22 }, 0 },
+	{ lampsurf, { 231, 144, 14, 22 }, 0 },
+	{ lampsurf, { 231, 162, 14, 22 }, 0 },
+	/* column 6 */
+	{ lampsurf, { 275,  42, 14, 22 }, 0 },
+	{ lampsurf, { 275,  59, 14, 22 }, 0 },
+	{ lampsurf, { 275,  76, 14, 22 }, 0 },
+	{ lampsurf, { 275,  93, 14, 22 }, 0 },
+	{ lampsurf, { 275, 110, 14, 22 }, 0 },
+	{ lampsurf, { 275, 127, 14, 22 }, 0 },
+	{ lampsurf, { 275, 144, 14, 22 }, 0 },
+	{ lampsurf, { 275, 162, 14, 22 }, 0 },
+	/* column 7 */
+	{ lampsurf, { 319,  42, 14, 22 }, 0 },
+	{ lampsurf, { 319,  59, 14, 22 }, 0 },
+	{ lampsurf, { 319,  76, 14, 22 }, 0 },
+	{ lampsurf, { 319,  93, 14, 22 }, 0 },
 	{ lampsurf, { 319, 110, 14, 22 }, 0 },
 	{ lampsurf, { 319, 127, 14, 22 }, 0 },
+	{ lampsurf, { 319, 144, 14, 22 }, 0 },
+	{ lampsurf, { 319, 161, 14, 22 }, 0 },
+	/* column 8 */
+	{ lampsurf, { 363,  42, 14, 22 }, 0 },
+	{ lampsurf, { 363,  59, 14, 22 }, 0 },
+	{ lampsurf, { 363,  76, 14, 22 }, 0 },
+	{ lampsurf, { 363,  93, 14, 22 }, 0 },
+	{ lampsurf, { 363, 110, 14, 22 }, 0 },
+	{ lampsurf, { 363, 127, 14, 22 }, 0 },
+	{ lampsurf, { 363, 144, 14, 22 }, 0 },
+	{ lampsurf, { 363, 161, 14, 22 }, 0 },
+	/* column 9 */
+	{ lampsurf, { 407,  42, 14, 22 }, 0 },
+	{ lampsurf, { 407,  59, 14, 22 }, 0 },
+	{ lampsurf, { 407,  76, 14, 22 }, 0 },
+	{ lampsurf, { 407,  93, 14, 22 }, 0 },
+	{ lampsurf, { 407, 110, 14, 22 }, 0 },
+	{ lampsurf, { 407, 127, 14, 22 }, 0 },
+	{ lampsurf, { 407, 144, 14, 22 }, 0 },
+	{ lampsurf, { 407, 161, 14, 22 }, 0 },
+	/* FE and SC see above */
 	/* column 12 */
 	{ lampsurf, { 539,  42, 14, 22 }, 0 },
 	{ lampsurf, { 539,  59, 14, 22 }, 0 },
@@ -326,6 +395,8 @@ Light ind_lights[] = {
 	{ lampsurf, { 539,  93, 14, 22 }, 0 },
 	{ lampsurf, { 539, 110, 14, 22 }, 0 },
 	{ lampsurf, { 539, 127, 14, 22 }, 0 },
+	/* SC0 *
+	 * FE0 */
 	/* column 13 */
 	{ lampsurf, { 583,  42, 14, 22 }, 0 },
 	{ lampsurf, { 583,  59, 14, 22 }, 0 },
@@ -344,34 +415,6 @@ Light ind_lights[] = {
 	{ lampsurf, { 627, 127, 14, 22 }, 0 },
 	{ lampsurf, { 627, 144, 14, 22 }, 0 },
 	{ lampsurf, { 627, 161, 14, 22 }, 0 },
-	/* column 9 */
-	{ lampsurf, { 407,  42, 14, 22 }, 0 },
-	{ lampsurf, { 407,  59, 14, 22 }, 0 },
-	{ lampsurf, { 407,  76, 14, 22 }, 0 },
-	{ lampsurf, { 407,  93, 14, 22 }, 0 },
-	{ lampsurf, { 407, 110, 14, 22 }, 0 },
-	{ lampsurf, { 407, 127, 14, 22 }, 0 },
-	{ lampsurf, { 407, 144, 14, 22 }, 0 },
-	{ lampsurf, { 407, 161, 14, 22 }, 0 },
-	/* sbr flip-flops */
-	{ lampsurf, {  99,  42, 14, 22 }, 0 },
-	{ lampsurf, {  99,  59, 14, 22 }, 0 },
-	{ lampsurf, {  99,  76, 14, 22 }, 0 },
-	{ lampsurf, {  99,  93, 14, 22 }, 0 },
-	{ lampsurf, {  99, 110, 14, 22 }, 0 },
-	{ lampsurf, {  99, 127, 14, 22 }, 0 },
-	{ lampsurf, {  99, 144, 14, 22 }, 0 },
-	{ lampsurf, {  99, 161, 14, 22 }, 0 },
-	{ lampsurf, { 143,  42, 14, 22 }, 0 },
-	{ lampsurf, { 143,  59, 14, 22 }, 0 },
-	{ lampsurf, { 143,  76, 14, 22 }, 0 },
-	{ lampsurf, { 143,  93, 14, 22 }, 0 },
-	{ lampsurf, { 143, 110, 14, 22 }, 0 },	// BLT
-	{ lampsurf, { 143, 127, 14, 22 }, 0 },
-	{ lampsurf, { 143, 144, 14, 22 }, 0 },
-	{ lampsurf, { 143, 162, 14, 22 }, 0 },	// IOT
-	{ lampsurf, { 319, 144, 14, 22 }, 0 },	// shf1
-	{ lampsurf, { 319, 161, 14, 22 }, 0 },	// sc=777
 };
 
 Light extra_lights[] = {
@@ -830,56 +873,103 @@ error:
 		ff_lght[5].state = apr.mc_rd;
 		ff_lght[6].state = apr.mc_wr;
 		ff_lght[7].state = apr.mc_rq;
-		ff_lght[8].state = apr.mc_split_cyc_sync;
-		ff_lght[9].state = apr.mc_stop_sync;
-		ff_lght[10].state = !apr.ex_user;
-		ff_lght[11].state = apr.cpa_illeg_op;
-		ff_lght[12].state = apr.ex_ill_op;
-		ff_lght[13].state = apr.ex_uuo_sync;
-		ff_lght[14].state = apr.ex_pi_sync;
-		ff_lght[15].state = apr.mq36;
-		ff_lght[16].state = apr.key_rim_sbr;
-		ff_lght[17].state = apr.ar_cry0_xor_cry1;
-		ff_lght[18].state = apr.ar_cry0;
-		ff_lght[19].state = apr.ar_cry1;
-		ff_lght[20].state = apr.ar_ov_flag;
-		ff_lght[21].state = apr.ar_cry0_flag;
-		ff_lght[22].state = apr.ar_cry1_flag;
-		ff_lght[23].state = apr.ar_pc_chg_flag;
-		ff_lght[24].state = apr.cpa_non_exist_mem;
-		ff_lght[25].state = apr.cpa_clock_enable;
-		ff_lght[26].state = apr.cpa_clock_flag;
-		ff_lght[27].state = apr.cpa_pc_chg_enable;
-		ff_lght[28].state = apr.cpa_arov_enable;
-		ff_lght[29].state = !!(apr.cpa_pia&4);
-		ff_lght[30].state = !!(apr.cpa_pia&2);
-		ff_lght[31].state = !!(apr.cpa_pia&1);
-		ff_lght[32].state = apr.pi_ov;
-		ff_lght[33].state = apr.pi_cyc;
-		ff_lght[34].state = !!apr.pi_req;
-		ff_lght[35].state = apr.iot_go;
-		ff_lght[36].state = apr.a_long;
-		ff_lght[37].state = apr.ma == apr.mas;
-		ff_lght[38].state = apr.uuo_f1;
-		ff_lght[39].state = apr.cpa_pdl_ov;
-		ff_lght[40].state = apr.if1a;
-		ff_lght[41].state = apr.af0;
-		ff_lght[42].state = apr.af3;
-		ff_lght[43].state = apr.af3a;
-		ff_lght[44].state = apr.et4_ar_pse;
-		ff_lght[45].state = apr.f1a;
-		ff_lght[46].state = apr.f4a;
-		ff_lght[47].state = apr.f6a;
-		ff_lght[48].state = apr.sf3;
-		ff_lght[49].state = apr.sf5a;
-		ff_lght[50].state = apr.sf7;
-		ff_lght[51].state = apr.ar_com_cont;
-		ff_lght[52].state = apr.blt_f0a;
-		ff_lght[53].state = apr.blt_f3a;
-		ff_lght[54].state = apr.blt_f5a;
-		ff_lght[55].state = apr.iot_f0a;
-		ff_lght[56].state = apr.shf1;
-		ff_lght[57].state = apr.sc == 0777;
+
+		ff_lght[8].state = apr.if1a;
+		ff_lght[9].state = apr.af0;
+		ff_lght[10].state = apr.af3;
+		ff_lght[11].state = apr.af3a;
+		ff_lght[12].state = apr.et4_ar_pse;
+		ff_lght[13].state = apr.f1a;
+		ff_lght[14].state = apr.f4a;
+		ff_lght[15].state = apr.f6a;
+
+		ff_lght[16].state = apr.sf3;
+		ff_lght[17].state = apr.sf5a;
+		ff_lght[18].state = apr.sf7;
+		ff_lght[19].state = apr.ar_com_cont;
+		ff_lght[20].state = apr.blt_f0a;
+		ff_lght[21].state = apr.blt_f3a;
+		ff_lght[22].state = apr.blt_f5a;
+		ff_lght[23].state = apr.iot_f0a;
+
+		ff_lght[24].state = 0;
+		ff_lght[25].state = 0;
+		ff_lght[26].state = 0;
+		ff_lght[27].state = 0;
+		ff_lght[28].state = 0;
+		ff_lght[29].state = 0;
+		ff_lght[30].state = 0;
+		ff_lght[31].state = 0;
+
+		ff_lght[32].state = 0;
+		ff_lght[33].state = 0;
+		ff_lght[34].state = 0;
+		ff_lght[35].state = 0;
+		ff_lght[36].state = 0;
+		ff_lght[37].state = 0;
+		ff_lght[38].state = 0;
+		ff_lght[39].state = 0;
+
+		ff_lght[40].state = 0;
+		ff_lght[41].state = 0;
+		ff_lght[42].state = 0;
+		ff_lght[43].state = 0;
+		ff_lght[44].state = 0;
+		ff_lght[45].state = 0;
+		ff_lght[46].state = 0;
+		ff_lght[47].state = 0;
+
+		ff_lght[48].state = 0;
+		ff_lght[49].state = 0;
+		ff_lght[50].state = 0;
+		ff_lght[51].state = 0;
+		ff_lght[52].state = apr.mc_split_cyc_sync;
+		ff_lght[53].state = apr.mc_stop_sync;
+		ff_lght[54].state = apr.shf1;
+		ff_lght[55].state = apr.sc == 0777;
+
+		ff_lght[56].state = apr.chf1;
+		ff_lght[57].state = apr.chf2;
+		ff_lght[58].state = apr.chf3;
+		ff_lght[59].state = apr.chf4;
+		ff_lght[60].state = apr.chf5;
+		ff_lght[61].state = apr.chf6;
+		ff_lght[62].state = apr.lcf1;
+		ff_lght[63].state = apr.dcf1;
+
+		ff_lght[64].state = apr.pi_ov;
+		ff_lght[65].state = apr.pi_cyc;
+		ff_lght[66].state = !!apr.pi_req;
+		ff_lght[67].state = apr.iot_go;
+		ff_lght[68].state = apr.a_long;
+		ff_lght[69].state = apr.ma == apr.mas;
+		ff_lght[70].state = apr.uuo_f1;
+		ff_lght[71].state = apr.cpa_pdl_ov;
+
+		ff_lght[72].state = !apr.ex_user;
+		ff_lght[73].state = apr.cpa_illeg_op;
+		ff_lght[74].state = apr.ex_ill_op;
+		ff_lght[75].state = apr.ex_uuo_sync;
+		ff_lght[76].state = apr.ex_pi_sync;
+		ff_lght[77].state = apr.mq36;
+
+		ff_lght[78].state = apr.key_rim_sbr;
+		ff_lght[79].state = apr.ar_cry0_xor_cry1;
+		ff_lght[80].state = apr.ar_cry0;
+		ff_lght[81].state = apr.ar_cry1;
+		ff_lght[82].state = apr.ar_ov_flag;
+		ff_lght[83].state = apr.ar_cry0_flag;
+		ff_lght[84].state = apr.ar_cry1_flag;
+		ff_lght[85].state = apr.ar_pc_chg_flag;
+
+		ff_lght[86].state = apr.cpa_non_exist_mem;
+		ff_lght[87].state = apr.cpa_clock_enable;
+		ff_lght[88].state = apr.cpa_clock_flag;
+		ff_lght[89].state = apr.cpa_pc_chg_enable;
+		ff_lght[90].state = apr.cpa_arov_enable;
+		ff_lght[91].state = !!(apr.cpa_pia&4);
+		ff_lght[92].state = !!(apr.cpa_pia&2);
+		ff_lght[93].state = !!(apr.cpa_pia&1);
 
 		setlights(membus0, membus_lght, 36);
 		setlights(apr.pr, pr_lght, 8);
diff --git a/mem b/mem
index 961c257..518ec88 100644
--- a/mem
+++ b/mem
@@ -1,4 +1,4 @@
 1000: 201040000002
 1001: 505040440700
-1002: 134140000001
+1002: 136200000001
 1003: 254200000000
diff --git a/pdp6.h b/pdp6.h
index 46cbf77..b45a24e 100644
--- a/pdp6.h
+++ b/pdp6.h
@@ -156,6 +156,7 @@ struct Apr {
 	bool f1a, f4a, f6a;
 	bool et4_ar_pse;
 	bool chf1, chf2, chf3, chf4, chf5, chf6, chf7;
+	bool lcf1, dcf1;
 	bool sf3, sf5a, sf7;
 	bool shf1;
 	bool iot_f0a;