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cleaned up the repo a bit
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92
README.md
92
README.md
@@ -21,13 +21,12 @@ The maintenance manual has flow charts, schematics and explanations:
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The code is more or less a transcription of the schematics into C.
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This means you will not understand it unless you're familiar with the maintenance manual.
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Pulses are represented as functions, when a pulse triggers another pulse
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it does so by the `nextpulse` function which adds a pulse to the list of next pulses.
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In the main cpu loop the list of current pulses is iterated and each pulse is called,
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then (after checking some external signals) the current and next pulse lists are swapped
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and the process begins anew.
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The timing was not accurately modeled and there is room for improvement.
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Due to the inexact timing the hardware connections (through the memory and IO bus)
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were not implemented too accurately. This may change in the future.
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it does so by the `pulse` function which queues a pulse in a list
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of pulses that are to happen, sorted chronologically.
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Between pulses that happen at different times
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various things are done like checking external pulses and advancing the
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simulation state.
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The timing is not yet 100% accurate but it's pretty close.
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### Building
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@@ -36,8 +35,8 @@ Otherwise you need SDL and pthread.
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### Running
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The cpu (apr), console tty and paper tape/punch are implemented.
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There are no other external devices yet.
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The cpu (apr), console tty, paper tape and punch,
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the data control and DECtape are implemented.
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The only things missing from the cpu is the repeat key mechanism.
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## Verilog Simulation
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@@ -59,17 +58,72 @@ The TTY is connected to UART over GPIO pins 4 (RX) and 5 (TX)
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## File tree
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* `emu` source for the emulator
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* `verilog` source for the verilog simulation
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* `art` everything graphical
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* `code` some test code for the PDP-6
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* `panel6` virtual panel for the FPGA
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* `tools` tools like an assembler and linker
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* `misc` some misc. and old stuff
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* emu the C emulator
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* emu/main_panel.c main file for emulator with panel simulation
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* emu/main_serial.c main file for emulator with panel over serial line
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* emu/emu.c top level emulator code
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* emu/cmd.c command line interface
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* emu/apr.c Arithmetic Processor 166 emulation
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* emu/mem.c core and fast memory emulation
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* emu/tty.c Teleprinter 626 emulator
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* emu/pt.c Paper tape reader 760 and punch 761 emulation
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* emu/dc.c Data Control 136 emulation
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* emu/dt.c DECtape 551 and 555 emulation
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* emu/netmem.c network protocol for shared memory
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* emu/util.c various utility functions
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* emu/util.h
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* emu/test_*.c test code, not too important anymore
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* emu/pdp6.h main header
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* emu/args.h argument parsing
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* emu/elements.inc panel definition
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* emu/cmds.txt command line interface documentation
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* emu/init.ini emulator init file
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* emu/mem_* core memory backing store
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* tools
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* tools/dtr2dta.c convert between raw (dtr) and simh (dta) DECtape format
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* tools/mkpty.c make a pty and connect to the controlling tty
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* tools/mkpty33.c as above but try to pretend an ASR33
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* tools/as6.c an assembler, roughly modeled on MACRO
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* tools/ld6.c a loader or relocatable files
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* tools/pdp6bin.h
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* tools/pdp6common.c useful functions for PDP-6 code
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* tools/pdp6common.h
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* tools/rel.c I have no recollection of this code
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* tools/reltest.c old test code to create a REL file
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* tools/test.s old test code for the assembler/linker
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* tools/test2.s
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* tools/ptdump.c print a paper tape file in octal
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* tools/dtdump.c print dtr DECtape
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* verilog
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* verilog/apr.v Arithmetic Processor 166 simulation
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* verilog/core161c.v Core memory 161C simulation
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* verilog/fast162.v Fast memory 162 simulation
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* verilog/modules.v utility modules
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* verilog/pdp6.v top level module
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* verilog/quartus various files for my terasic board
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* verilog/test_dec.v inst decoding test
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* verilog/test.v misc tests
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* verilog/test1.inc
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* verilog/test2.inc
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* verilog/test_fp.inc
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* code random code for the PDP-6, mostly testing
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* code/bootstrap.txt a list of boot loaders
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* code/dtboot.s loads the first block from a DECtape
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* code/main.s random entry
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* code/tty.s tty character IO
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* panel stand alone panel with lots of duplicate code
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* art image files for the panel
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* misc nothing important
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## To do
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- repeat and maint. switches
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- test thoroughly!
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- devices (test UT, implement 340)
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- timing
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- improve timing
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- implement 340 display
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- do more tests
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