diff --git a/pll/pll_ehxplll.v b/pll/pll_ehxplll.v
index bc032ba..c8fe212 100644
--- a/pll/pll_ehxplll.v
+++ b/pll/pll_ehxplll.v
@@ -1,4 +1,4 @@
-module pll_ecp5_evn(input clki, output clko, output lock);
+module pll(input clki, output clko, output lock);
     (* ICP_CURRENT="12" *) (* LPF_RESISTOR="8" *) (* MFG_ENABLE_FILTEROPAMP="1" *) (* MFG_GMCREF_SEL="2" *)
     EHXPLLL #(
         .PLLRST_ENA("DISABLED"),
diff --git a/pll/pll_mmcme2.v b/pll/pll_mmcme2.v
index ee4fc65..90014bf 100644
--- a/pll/pll_mmcme2.v
+++ b/pll/pll_mmcme2.v
@@ -1,4 +1,4 @@
-module pll_ecp5_evn(input clki, output clko, output lock);
+module pll(input clki, output clko, output lock);
 
 wire clkfb;
 
diff --git a/toplevel.v b/toplevel.v
index 9f0977d..a9412fb 100644
--- a/toplevel.v
+++ b/toplevel.v
@@ -14,7 +14,7 @@ wire clock_out;
 reg reset_out;
 wire lock;
 
-pll_ecp5_evn pll(
+pll chiselwatt_pll(
 	.clki(clock),
 	.clko(clock_out),
 	.lock(lock)