github.com/antonblanchard.chiselwatt
1
0
Fork 0
mirror of https://github.com/antonblanchard/chiselwatt.git synced 2026-03-06 03:20:07 +00:00
Code Releases Activity
Files
80d8e3a2cb184c571e9a24b4703ebf0f6b09d5ea
antonblanchard.chiselwatt/src
History
Anton Blanchard 4dc5f030e0 Improve memory read timing by removing readData signals 
There's no need to gate reads.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2020-02-05 12:06:17 +11:00
..
main/scala
Improve memory read timing by removing readData signals
2020-02-05 12:06:17 +11:00
test/scala
Improve memory read timing by removing readData signals
2020-02-05 12:06:17 +11:00