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syscon: Add syscon registers
These provides some info about the SoC (though it's still somewhat incomplete and needs more work, see comments). There's also a control register for selecting DRAM vs. BRAM at 0 (and for soft-resetting the SoC but that isn't wired up yet). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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@@ -46,6 +46,7 @@ filesets:
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- wishbone_bram_wrapper.vhdl
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- soc.vhdl
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- xics.vhdl
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- syscon.vhdl
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file_type : vhdlSource-2008
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fpga:
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