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FPU: Allow mtfsb* to set FPSCR[FX] implicitly

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If mtfsb1 causes an individual exception bit to go from 0 to 1, that
should set FX as well.  Arrange for this by setting update_fx to 1.
Also make sure mcrfs doesn't copy the reserved FPSCR bit.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
This commit is contained in:
Paul Mackerras
2025-12-09 11:20:23 +11:00
parent e471581222
commit 32919435a3
3 changed files with 5 additions and 4 deletions
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6
tests/fpu/fpu.c
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@@ -351,15 +351,15 @@ int test4(long arg)
fpscr = fpscr_eval((fpscr & 0x0fffffff) | 0x70000000);
if (get_fpscr() != fpscr)
return 16 * i + 27;
asm("mtfsb0 21");
asm("mtfsb0 21"); /* VXSOFT */
fpscr = fpscr_eval(fpscr & ~(1 << (31-21)));
if (get_fpscr() != fpscr)
return 16 * i + 28;
asm("mtfsb1 21");
fpscr = fpscr_eval(fpscr | (1 << (31-21)));
fpscr = fpscr_eval(fpscr | (1 << (31-21)) | (1ul << 31));
if (get_fpscr() != fpscr)
return 16 * i + 29;
asm("mtfsb0 24");
asm("mtfsb0 24"); /* OE */
fpscr = fpscr_eval(fpscr & ~(1 << (31-24)));
if (get_fpscr() != fpscr)
return 16 * i + 30;

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tests/test_fpu.bin
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